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AM29DL640D90 Datasheet(Hoja de datos) 3 Page - Advanced Micro Devices

No. de Pieza. AM29DL640D90
Descripción  64 Megabit CMOS 3.0 Volt-only, Simultaneous Read/Write Flash Memory
Descarga  54 Pages
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Fabricante  AMD [Advanced Micro Devices]
Página de inicio  http://www.amd.com
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Am29DL640D
October 7, 2004
GENERAL DESCRIPTION
The Am29DL640D is a 64 megabit, 3.0 volt-only flash
memory device, organized as 4,194,304 words of 16
bits each or 8,388,608 bytes of 8 bits each. Word
mode data appears on DQ0–DQ15; byte mode data
appears on DQ0–DQ7. The device is designed to be
programmed in-system with the standard 3.0 volt V
CC
supply, and can also be programmed in standard
EPROM programmers.
The device is available with an access time of 90 or
120 ns and is offered in 48-pin TSOP and 63-ball
Fine-Pitch BGA. Standard control pins—chip enable
(CE#), wr ite enable (WE#), and ou tput enable
(OE#)—control normal read and write operations, and
avoid bus contention issues.
The device requires only a single 3.0 volt power sup-
ply for both read and write functions. Internally
generated and regulated voltages are provided for the
program and erase operations.
Simultaneous Read/Write Operations with
Zero Latency
The Simultaneous Read/Write architecture provides
simultaneous operation by dividing the memory
space into four banks, two 8 Mb banks with small and
large sectors, and two 24 Mb banks of large sectors.
Sector addresses are fixed, system software can be
used to form user-defined bank groups.
During an Erase/Program operation, any of the three
non-busy banks may be read from. Note that only two
banks can operate simultaneously. The device can im-
prove overall system performance by allowing a host
sy stem to progra m or erase in one bank, then
immediately and simultaneously read from the other
bank, with zero latency. This releases the system from
waiting fo r the completion o f progra m or erase
operations.
The Am29DL640D can be organized as both a top and
bottom boot sector configuration.
Am29DL640D Features
The SecSi™ (Secured Silicon) Sector is an extra
256 byte sector capable of being permanently locked
by AMD or customers. The SecSi Indicator Bit (DQ7)
is permanently set to a 1 if the part is factory locked,
and set to a 0 if customer lockable. This way, cus-
tomer lockable parts can never be used to replace a
factory locked part.
Factory locked parts provide several options. The
SecSi Sector may store a secure, random 16 byte
ESN (Electronic Serial Number), customer code (pro-
grammed through AMD’s ExpressFlash service), or
both. Customer Lockable parts may utilize the SecSi
Sector as bonus space, reading and writing like any
other flash sector, or may permanently lock their own
code there.
DMS (Data Management Software) allows systems
to easily take advantage of the advanced architecture
of the simultaneous read/write product line by allowing
removal of EEPROM devices. DMS will also allow the
system software to be simplified, as it will perform all
functions necessary to modify data in file structures,
as opposed to single-byte modifications. To write or
update a particular piece of data (a phone number or
configuration data, for example), the user only needs
to state which piece of data is to be updated, and
where the updated data is located in the system. This
is an a d vantage c o mpared to s y s t e m s w here
user-written software must keep track of the old data
location, status, logical to physical translation of the
data onto the Flash memory device (or memory de-
vices), and more. Using DMS, user-written software
does not need to interface with the Flash memory di-
rectly. Instead, the user's software accesses the Flash
memory by calling one of only six functions. AMD pro-
vides this software to simplify system design and
software integration efforts.
The device offers complete compatibility with the
JEDEC single-power-supply Flash command set
standard. Commands are written to the command
register using standard microprocessor write timings.
Reading data out of the device is similar to reading
from other Flash or EPROM devices.
The host system can detect whether a program or
erase operation is complete by using the device sta-
tus bits: RY/BY# pin, DQ7 (Data# Polling) and
DQ6/DQ2 (toggle bits). After a program or erase cycle
has been completed, the device automatically returns
to the read mode.
The sector erase architecture allows memory sec-
tors to be erased and reprogrammed without affecting
the data contents of other sectors. The device is fully
erased when shipped from the factory.
Hardware data protection measures include a low
V
CC detector that automatically inhibits write opera-
tions during power transitions. The hardware sector
protection feature disables both program and erase
operations in any combination of the sectors of mem-
or y. Thi s c an be ac hie v ed in-s y s t e m or v i a
programming equipment.
The device offers two power-saving features. When
addresses have been stable for a specified amount of
time, the device enters the automatic sleep mode.
Th e syste m can also place the device into th e
standby mode. Power consumption is greatly re-
duced in both modes.
Bank
Megabits
Sector Sizes
Bank 1
8 Mb
Eight 8 Kbyte/4 Kword,
Fifteen 64 Kbyte/32 Kword
Bank 2
24 Mb
Forty-eight 64 Kbyte/32 Kword
Bank 3
24 Mb
Forty-eight 64 Kbyte/32 Kword
Bank 4
8 Mb
Eight 8 Kbyte/4 Kword,
Fifteen 64 Kbyte/32 Kword




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