Motor de Búsqueda de Datasheet de Componentes Electrónicos |
|
LMZM23601V3SILR Datasheet(PDF) 19 Page - Texas Instruments |
|
|
LMZM23601V3SILR Datasheet(HTML) 19 Page - Texas Instruments |
19 / 44 page 19 LMZM23601 www.ti.com SNVSAQ4A – DECEMBER 2017 – REVISED APRIL 2018 Product Folder Links: LMZM23601 Submit Documentation Feedback Copyright © 2017–2018, Texas Instruments Incorporated Feature Description (continued) 8.3.7.4 SYNC Operation It is often desirable to synchronize the switching frequency of multiple regulators in a single system. This technique results in better defined EMI behavior and can reduce the need for capacitance on some power rails. The LMZM23601 MODE/SYNC input allows synchronization to an external clock. The LMZM23601 implements an in-phase locking scheme – the rising edge of the clock signal provided to the input of the LMZM23601 device corresponds to turning on the high-side MOSFET device. This function is implemented using phase locking over a limited frequency range eliminating large glitches upon initial application of an external clock. The clock fed into the LMZM23601 device replaces the internal free-running clock but does not affect frequency foldback operation. The foldback function takes over and the output voltage continues to be well regulated using frequency reduction when duty factors outside of the normal duty cycle range are reached. When the device is synchronized to the lower end of the synchronization range the internal inductor will see higher peak currents. For high current ripple designs (for example, high input voltage and 12-V and 15-V output designs), the maximum current capability of the device may be derated. The device remains in FPWM mode and operates in CCM for light loads when synchronization input is provided. The MODE/SYNC function logic always prioritizes the proper regulation of the output voltage. Table 2 summarizes the MODE/SYNC function and the operating switching frequency with various conditions. See Typical Characteristics for frequency foldback vs input voltage behavior. Table 2. Switching Frequency and MODE/SYNC Function DEVICE SWITCHING FREQUENCY MODE/SYNC LIGHT LOAD FULL LOAD VIN > 28 V IN DROPOUT MODE ADJ Output Logic LOW = Auto PFM Reduced (save power) Fixed 1000 kHz Reduced (maintain regulation) Reduced (maintain regulation) Logic HIGH = FPWM Fixed 1000 kHz Fixed 1000 kHz Reduced (maintain regulation) Reduced (maintain regulation) Valid FSYNC Input FSYNC FSYNC Reduced (maintain regulation) Reduced (maintain regulation) Fixed 3.3-V Output or 5-V Output Logic LOW = Auto PFM Reduced (save power) Fixed 750 kHz Fixed 750 kHz Reduced (maintain regulation) Logic HIGH = FPWM Fixed 750 kHz Fixed 750 kHz Fixed 750 kHz Reduced (maintain regulation) Valid FSYNC Input FSYNC FSYNC FSYNC Reduced (maintain regulation) 8.3.8 Thermal Protection The LMZM23601 monitors its junction temperature (TJ) and shuts off if the it gets too hot. The thermal shutdown threshold for the junction is typically 155°C. Both, high-side and low-side power MOSFETs are turned off until the junction temperature has decreased under the hysteresis level, typically 15°C below the shutdown temperature. |
Número de pieza similar - LMZM23601V3SILR |
|
Descripción similar - LMZM23601V3SILR |
|
|
Enlace URL |
Política de Privacidad |
ALLDATASHEET.ES |
¿ALLDATASHEET es útil para Ud.? [ DONATE ] |
Todo acerca de Alldatasheet | Publicidad | Contáctenos | Política de Privacidad | Intercambio de Enlaces | Lista de Fabricantes All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |