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LTM8003 Datasheet(PDF) 25 Page - Linear Technology |
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LTM8003 Datasheet(HTML) 25 Page - Linear Technology |
25 / 30 page LTM8003 25 8003fc For more information www.linear.com/LTM8003 Fault Tolerance The fixed output version of LTM8003 is designed to tol- erate a single fault condition. Shorting two adjacent pins together or leaving one single pin floating does not raise VOUTorcausedamagetotheLTM8003µModuleregulator. Table 2 describe the effects that result from shorting ad- jacent pins. Note that, since all pins are redundant, there is no analysis describing what happens when a single pin opens. The NC pins must be left floating to ensure fault tolerance. Table 3. Table 2. FMEA Analysis — Adjacent Pin Short Test PIN NAME HEAT SMOKE EFFECT VIN–NC NO NO Circuit behaves normally. VIN–RUN NO NO Circuit behaves normally. RUN–NC NO NO Circuit behaves normally. RUN–RT NO NO VOUT falls to 0V. Device can be damaged if EN/UV voltage is higher than RT ABS MAX. RUN–GND NO NO Vout falls to 0V. RT–GND NO NO SW frequency increases. VOUT may fall below regulation voltage. RT–GND BANK1 NO NO SW frequency increases. VOUT may fall below regulation voltage. RT–TRSS NO NO VOUT will fall below regulation voltage. TR/SS–SYNC NO NO VOUT will fall below regulation voltage. TR/SS–GND BANK1 NO NO VOUT will fall below regulation voltage. SYNC–GND NO NO Circuit behaves normally. SYNC–PG NO NO Circuit behaves normally. SYNC–GND BANK1 NO NO Circuit behaves normally. BIAS–GND BANK1 NO NO Efficiency may decrease. BIAS–VOUT BANK3 NO NO Efficiency may decrease. If BIAS is tied to a voltage source > VOUT, VOUT may rise. If BIAS is tied to a votlage source < VOUT, VOUT may be reduced. VOUT BANK3–GND BANK1 NO NO VOUT will fall to 0V. |
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