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ST6262C Datasheet(PDF) 19 Page - STMicroelectronics |
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ST6262C Datasheet(HTML) 19 Page - STMicroelectronics |
19 / 78 page 19/78 ST62T52C ST62T62C/E62C CLOCK SYSTEM (Cont’d) Turning on the main oscillator is achieved by re- setting the OSCOFF bit of the A/D Converter Con- trol Register or by resetting the MCU. Restarting the main oscillator implies a delay comprising the oscillator start up delay period plus the duration of the software instruction at fLFAO clock frequency. 3.1.2 Low Frequency Auxiliary Oscillator (LFAO) The Low Frequency Auxiliary Oscillator has three main purposes. Firstly, it can be used to reduce power consumption in non timing critical routines. Secondly, it offers a fully integrated system clock, without any external components. Lastly, it acts as a safety oscillator in case of main oscillator failure. This oscillator is available when the OSG ENA- BLED option is selected. In this case, it automati- cally starts one of its periods after the first missing edge from the main oscillator, whatever the reason (main oscillator defective, no clock circuitry provid- ed, main oscillator switched off...). User code, normal interrupts, WAIT and STOP in- structions, are processed as normal, at the re- duced fLFAO frequency. The A/D converter accura- cy is decreased, since the internal frequency is be- low 1MHz. At power on, the Low Frequency Auxiliary Oscilla- tor starts faster than the Main Oscillator. It there- fore feeds the on-chip counter generating the POR delay until the Main Oscillator runs. The Low Frequency Auxiliary Oscillator is auto- matically switched off as soon as the main oscilla- tor starts. ADCR Address: 0D1h — Read/Write Bit 7-3, 1-0= ADCR7-ADCR3, ADCR1-ADCR0: ADC Control Register. These bits are not used. Bit 2 = OSCOFF. When low, this bit enables main oscillator to run. The main oscillator is switched off when OSCOFF is high. 3.1.3 Oscillator Safe Guard The Oscillator Safe Guard (OSG) affords drastical- ly increased operational integrity in ST62xx devic- es. The OSG circuit provides three basic func- tions: it filters spikes from the oscillator lines which would result in over frequency to the ST62 CPU; it gives access to the Low Frequency Auxiliary Os- cillator (LFAO), used to ensure minimum process- ing in case of main oscillator failure, to offer re- duced power consumption or to provide a fixed fre- quency low cost oscillator; finally, it automatically limits the internal clock frequency as a function of supply voltage, in order to ensure correct opera- tion even if the power supply should drop. The OSG is enabled or disabled by choosing the relevant OSG option. It may be viewed as a filter whose cross-over frequency is device dependent. Spikes on the oscillator lines result in an effectively increased internal clock frequency. In the absence of an OSG circuit, this may lead to an over fre- quency for a given power supply voltage. The OSG filters out such spikes (as illustrated in Figure 9.). In all cases, when the OSG is active, the max- imum internal clock frequency, fINT, is limited to fOSG, which is supply voltage dependent. This re- lationship is illustrated in Figure 12.. When the OSG is enabled, the Low Frequency Auxiliary Oscillator may be accessed. This oscilla- tor starts operating after the first missing edge of the main oscillator (see Figure 10.). Over-frequency, at a given power supply level, is seen by the OSG as spikes; it therefore filters out some cycles in order that the internal clock fre- quency of the device is kept within the range the particular device can stand (depending on VDD), and below fOSG: the maximum authorised frequen- cy with OSG enabled. Note. The OSG should be used wherever possible as it provides maximum safety. Care must be tak- en, however, as it can increase power consump- tion and reduce the maximum operating frequency to fOSG. Warning: Care has to be taken when using the OSG, as the internal frequency is defined between a minimum and a maximum value and is not accu- rate. For precise timing measurements, it is not recom- mended to use the OSG and it should not be ena- bled in applications that use the SPI or the UART. It should also be noted that power consumption in Stop mode is higher when the OSG is enabled (around 50µA at nominal conditions and room temperature). 70 ADCR 7 ADCR 6 ADCR 5 ADCR 4 ADCR 3 OSC OFF ADCR 1 ADCR 0 |
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