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NCP5183 Datasheet(PDF) 13 Page - ON Semiconductor |
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NCP5183 Datasheet(HTML) 13 Page - ON Semiconductor |
13 / 15 page NCP5183, NCV5183 www.onsemi.com 13 4. Let’s determine acceptable voltage ripple on Cboot to 1% of nominal value, which is 150 mV. To cover charge losses from eq. 2 C boot + Q tot V ripple + 30.4n 0.15 + 203 nF (eq. 3) It is recommended to increase the value as consumption and gate charge are temperature and voltage dependent, so let’s choose a capacitor 330 nF in this case. Rboot Resistor Value Calculation To keep the application running properly, it is necessary to charge the Cboot again. This is done by external diode from VCC line to VB pin. In serial with the diode a resistor is placed to reduce the current peaks from VCC line. The resistor value selection is critical for proper function of the high side driver. If too small high current peaks are drown from VCC line, if too high the capacitor will not be charged to appropriate level and the high side driver can be disabled by internal UVLO protection. First of all keep in mind the capacitor is charged through the external boot strap diode, so it can be charged to a maximum voltage level of VCC – Vf. The resistor value is calculated using this equation: R boot + t charge C boot @ ln Vmax*VCmin Vmax*VCmax + 5 m 330n @ ln 14.4*14.2 14.4 *14.35 ^ (eq. 4) ^ 11 W Where: tcharge – time period the Cboot is being charged, usually the period the low side MOSFET is turned on Cboot – boot strap capacitor value Vmax – maximum voltage the Cboot capacitor can be theoretically charged to. Usually the VCC – Vf . The Vf is forward voltage of used diode. VCmin –the voltage level the capacitor is charged from VCmax –the voltage level the capacitor is charged to. It is necessary to determine the target voltage for charging, because in theory, when a capacitor is charged from a voltage source through a resistor, the capacitor can never reach the voltage of the source. In this particular case a 50 mV difference (between the voltage behind the diode and VCmax) is used. The resistor value obtained from eq. 4 does not count with the quiescent current IB2 of the high side driver. This current will create another voltage drop of: V IB2_drop + Rboot @ IB2 + 11 @ 81m ^ 0.9 mV (eq. 5) The current consumed by high side driver will be higher, because the IB2 is valid when the device is not switching. While switching, losses by charging and discharging internal transistors as well as the level shifters will be added. This current will increase with frequency. The additional 0.9 mV drop will be added to VCmax value. The additional 0.9 mV drop can be either accepted or the Rboot value can be recalculated to eliminate this additional drop. The resistor Rboot calculated in eq. 4 is valid under steady state conditions. During start and/or skip operation the starting point voltage value is different (lower) and it takes more time to charge the boot strap capacitor. More over it is not counted with temperature and voltage variability during normal operation or the dynamic resistance of the boot strap diode (approximately 0.34 W for MURA160). From these reasons the resistor value should be decreased especially with respect to skip operation. Boot strap resistor losses calculation. P Rboot ^ Qtot @ VCmax @ f + 30.4n @ 14.4 @ 100k ^ 44 mW (eq. 6) Boot strap diode losses calculation. P Dboot ^ Qtot @ Vf @ f + 30.4n @ 0.6 @ 100k ^ 1.8 mW (eq. 7) Please keep in mind the value is temperature and voltage dependent. Especially Cboot voltage can be higher than calculated value. See “Layout recommendation” section for more details. Total Power Dissipation The NCP5183 is suitable to drive high input capacitance MOSFET, from this reason it is equipped with high current capability drivers. Power dissipation on the die, especially at high frequencies can be limiting factor for using this driver. It is important to not exceed maximum junction temperature (listed in absolute maximum ratings table) in any cases. To calculate approximate power losses follow these steps: 1. Power loss of device (except drivers) while switching at appropriate frequency (see Figure 26) is equal to P logic + PHS ) PLS + (Vboot @ IB2) ) (VCC @ ICC2) + (eq. 8) + (14.4 @ 1.6m) ) (15 @ 0.6m) ^ 32.1 mW 2. Power loss of drivers P drivers + (Qg @ Vboot) ) (Qg @ VCC) @ f + (eq. 9) + ((30n @ 14.4) ) (30n @ 15)) @ 100k ^ 88 mW 3. Total power losses P total + Plogic ) Pdrivers + 32.1m ) 88m ^ 120 mW (eq. 10) 4. Junction temperature increase for calculated power loss t J + RtJa @ Ptotal + 183 @ 0.12 ^ 22 K (eq. 11) The temperature calculated in eq. 11 is the value which has to be added to ambient temperature. In case the ambient temperature is 30 °C, the junction temperature will be 52°C. |
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