ISL97678

FN6998 Rev.3.00

Page 14 of 17

Sep 8, 2017

Components Selections

According to the inductor Voltage-Second Balance principle, the

change of inductor current during the switching regulator

On-time is equal to the change of inductor current during the

switching regulator Off-time. The voltage across an inductor is as

shown in Equation 6:

and

where D is the switching duty cycle defined by the turn-on time

that can be neglected for approximation.

ratio and duty cycle respectively as Equations 8 and 9:

Input Capacitor

Switching regulators require input capacitors to deliver peak

charging current and to reduce the impedance of the input

supply. This reduces interaction between the regulator and input

supply, thereby improving system stability. The high switching

frequency of the loop causes almost all ripple current to flow in

the input capacitor, which must be rated accordingly.

A capacitor with low internal series resistance should be chosen

to minimize heating effects and improve system efficiency, such

as X5R or X7R ceramic capacitors, which offer small size and a

lower value of temperature and voltage coefficient compared to

other ceramic capacitors.

It is recommended that an input capacitor of at least 10µF be

used. Ensure the voltage rating of the input capacitor is suitable

to handle the full supply range.

3

CH1 Short Circuit

Upper OTP not triggered

CH1 disabled after 6 PWM cycles

time-out.

If 3 channels are already shut

down, all channels will be shut

down. Otherwise CH2-8 will

remain as normal

Highest VF of CH2

through CH8

4CH1 Open Circuit

with infinite

resistance

Upper OTP not triggered

time-out after 6 PWM cycles and

level.

CH2 through CH8 Normal

Highest VF of CH2

through CH8

5CH1 LED Open

Circuit but has

paralleled Zener

Upper OTP not triggered

CH1 remains ON and has highest

CH2 through CH8 ON, Q2 through

Q8 burn power

VF of CH1

6CH1 LED Open

Circuit but has

paralleled Zener

Upper OTP triggered but

CH1 goes off

Same as CH1

VF of CH1

7CH1 LED Open

Circuit but has

paralleled Zener

Upper OTP not triggered

CH1 OFF

CH2 through CH8 Normal

Highest VF of CH2

through CH8

Upper OTP not triggered

CH1 remains ON and has highest

switches OFF. This is an

unwanted shut off and can be

prevented by setting OVP and/or

VSC at an appropriate level.

VF of CH1

8

Channel-to-Channel

VF too high

Lower OTP triggered but

Any channel at below the target current will fault out after 6 PWM

cycles.

Remaining channels driven with normal current.

Highest VF of CH1

through CH8

9

Channel-to-Channel

VF too high

Upper OTP triggered but

All channels switched off

Highest VF of CH1

through CH8

10

Output LED string

voltage too high

Driven with normal current. Any channel that is below the target current

will time-out after 6 PWM cycles.

Highest VF of CH1

through CH8

11

GND

LX will not switch

TABLE 1. PROTECTIONS TABLE (Continued)

CASE

FAILURE MODE

DETECTION MODE

FAILED CHANNEL ACTION

GOOD CHANNELS ACTION

BY

L

I





=

(EQ. 6)

V



I

0

 L





–

–



=



L1



D

 t

S



–





–

(EQ. 7)

–





=



(EQ. 8)





–

=

(EQ. 9)