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MC68HC11A0CFU2 Datasheet(PDF) 4 Page - Motorola, Inc |
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MC68HC11A0CFU2 Datasheet(HTML) 4 Page - Motorola, Inc |
4 / 158 page MOTOROLA MC68HC11A8 iv TECHNICAL DATA 3.5.2 Programming/Erasing Internal EEPROM .......................................... 3-7 3.5.2.1 Read .......................................................................................... 3-7 3.5.2.2 Programming ............................................................................. 3-7 3.5.2.3 Bulk Erase ................................................................................. 3-8 3.5.2.4 Row Erase ................................................................................. 3-8 3.5.2.5 Byte Erase ................................................................................. 3-9 3.5.3 System Configuration Register (CONFIG) ........................................ 3-9 3.5.3.1 Programming and Erasure of the CONFIG Register ............... 3-10 3.5.3.2 Operation of the Configuration Mechanism ............................. 3-12 4 PARALLEL I/O 4.1 General-Purpose I/O (Ports C and D) ....................................................... 4-1 4.2 Fixed Direction I/O (Ports A, B, and E) ...................................................... 4-1 4.3 Simple Strobed I/O .................................................................................... 4-2 4.3.1 Strobed Input Port C .......................................................................... 4-2 4.3.2 Strobed Output Port B ....................................................................... 4-2 4.4 Full Handshake I/O .................................................................................... 4-2 4.4.1 Input Handshake Protocol ................................................................. 4-3 4.4.2 Output Handshake Protocol .............................................................. 4-3 4.5 Parallel I/O Control Register (PIOC) ......................................................... 4-4 5 SERIAL COMMUNICATIONS INTERFACE 5.1 Overview and Features ............................................................................. 5-1 5.1.1 SCI Two-Wire System Features ........................................................ 5-1 5.1.2 SCI Receiver Features ...................................................................... 5-1 5.1.3 SCI Transmitter Features .................................................................. 5-1 5.2 Data Format .............................................................................................. 5-1 5.3 Wake-Up Feature ...................................................................................... 5-2 5.4 Receive Data (RxD) .................................................................................. 5-2 5.5 Start Bit Detection ..................................................................................... 5-3 5.6 Transmit Data (TxD) .................................................................................. 5-5 5.7 Functional Description ............................................................................... 5-5 5.8 SCI Registers ............................................................................................ 5-5 5.8.1 Serial Communications Data Register (SCDR) ................................. 5-6 5.8.2 Serial Communications Control Register 1 (SCCR1) ........................ 5-8 5.8.3 Serial Communications Control Register 2 (SCCR2) ........................ 5-8 5.8.4 Serial Communications Status Register (SCSR) ............................ 5-10 5.8.5 Baud Rate Register (BAUD) ............................................................ 5-11 6 SERIAL PERIPHERAL INTERFACE 6.1 Overview and Features ............................................................................. 6-1 6.2 SPI Signal Descriptions ............................................................................. 6-1 6.2.1 Master In Slave Out (MISO) .............................................................. 6-1 6.2.2 Master Out Slave In (MOSI) .............................................................. 6-1 6.2.3 Serial Clock (SCK) ............................................................................ 6-2 |
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