ISO224

GND2

TLV6001

+

±

VDD1

VIN

VCAP

GND1

VDD2

VOUTP

VOUTN

GND2

To ADC

16

ISO224

SBAS738 – JUNE 2018

www.ti.com

Product Folder Links: ISO224

Submit Documentation Feedback

Copyright © 2018, Texas Instruments Incorporated

9.2.2 Detailed Design Procedure

The high-side power supply (VDD1) for the device is generated with a suitable isolated power source. An

example of such a circuit is provided in the Power Supply Recommendations section.

The floating ground reference (GND1) is derived from one of the ends of the shunt resistor that is connected to

the negative input of the device (VINN). If a four-pin shunt is used, the inputs of the device are connected to the

inner leads and GND1 is connected to one of the outer shunt leads.

•

•

Table 2 lists examples of nominal E96-series (1% accuracy) resistor values for AC systems using 120 V, 240 V,

and 400 V as nominal voltages.

Table 2. Resistor Value Examples

PARAMETER

115 kΩ

237 kΩ

392 kΩ

12.7 kΩ

12.4 kΩ

12.1 kΩ

0.93 mA

0.93 mA

0.98 mA

±11.934 V

±11.933 V

±11.977 V

For systems using single-ended input ADCs with a 5-V supply, Figure 10 shows an example of a TLV6001-based

signal conversion and filter circuit. Tailor the bandwidth of this filter stage to the bandwidth requirement of the

system and use NP0-type capacitors for best performance.

Figure 10. Connecting the ISO224 Output to a Single-Ended Input 5-V ADC

For systems using single-ended, ±10-V input ADCs, the ISO224EVM offers a signal path based on an OPA277

that converts the differential output of the ISO224 and limits the signal bandwidth to 50 kHz.

For more information on the general procedure to design the filtering and driving stages of SAR ADCs, consult

the TI Precision Designs 18-Bit, 1MSPS Data Acquisition Block (DAQ) Optimized for Lowest Distortion and Noise

and 18-Bit Data Acquisition Block (DAQ) Optimized for Lowest Power, available for download at www.ti.com.