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TPA28F400CV-T60 Datasheet(PDF) 4 Page - Intel Corporation

No. de Pieza. TPA28F400CV-T60
Descripción  2-MBIT SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY
Descarga  55 Pages
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Fabricante  INTEL [Intel Corporation]
Página de inicio  http://www.intel.com
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TPA28F400CV-T60 Datasheet(HTML) 4 Page - Intel Corporation

 
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2-MBIT SmartVoltage BOOT BLOCK FAMILY
E
4
SEE NEW DESIGN RECOMMENDATIONS
REVISION HISTORY
Number
Description
-001
Initial release of datasheet.
-002
Status changed from Product Preview to Preliminary
28F200CV/CE/BE references and information added throughout.
2.7 V CE/BE specs added throughout.
The following sections have been changed or rewritten: 1.1, 3.0, 3.2.1, 3.2.2, 3.3.1,
3.3.1.1, 3.3.2, 3.3.2.1, 3.3.3, 3.3.4, 3.6.2.
Note 2 added to Figure 3 to clarify 28F008B pinout vs. 28F008SA.
Sentence about program and erase WSM timeout deleted from Section 3.3.3, 3.3.4.
Erroneous arrows leading out of error states deleted from flowcharts in Figs. 9, 10.
Sections 5.1, 6.1 changed to “Applying VCC Voltages.” These sections completely
changed to clarify VCC ramp requirements.
IPPD 3.3 V Commercial spec changed from 10 to 5
µA.
Capacitance tables added after commercial and extended DC Characteristics tables.
Test and slew rate notes added to Figs. 12, 13, 19, 20, 21.
Test configuration drawings (Fig. 14, 22) consolidated into one, with component
values in table. (Component values also rounded off).
tELFL, tELFH, tAVFL changed from 7 to 5 ns for 3.3 V BV-60 commercial and 3.3 V
TBV-80 extended, 10 to 5 ns for 3.3 V BV-80 and BV-120 commercial.
tWHAX and tEHAX changed from 10 to 0 ns.
tPHWL changed from 1000 ns to 800 ns for 3.3 V BV-80, BV-120 commercial.
tPHEL changed from 1000 ns to 800 ns for 3.3 V BV-60, BV-80, and BV-120 commercial.
-003
Applying VCC voltages (Sections 5.1 and 6.1) rewritten for clarity.
Minor cosmetic changes/edits.
-004
Corrections: “This pin not available on 44-PSOP” inaccurate statement removed from pin
description for WP# pin; Spec “tQWL” corrected to “tQVVL;” intelligent identifier values
corrected; Intel386™ EX block diagram updated because new 386 specs require less
glue logic.
Max program times for parameter and 96-KB main block added.
Specs tELFL and tELFH changed from 5 ns (max) to 0 ns (min).
Specs tEHQZ and tHQZ improved.
New specs tPLPH and tPLQZ added from Specification Update document (297612).
-005
Corrections: Figure 4, corrected pin designation 3 to “NC” from A17 on PA28F200.
Corrected typographical errors in
Ordering Information.
Added
New Design Recommendations section to cover page.
Updated
Erase Suspend/Resume Flowchart


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