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25LC160A Datasheet(PDF) 3 Page - Microchip Technology

No. de Pieza. 25LC160A
Descripción  16K SPI Bus Serial EEPROM
Descarga  24 Pages
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Fabricante  MICROCHIP [Microchip Technology]
Página de inicio  http://www.microchip.com
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25LC160A Datasheet(HTML) 3 Page - Microchip Technology

 
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 2003 Microchip Technology Inc.
DS21807B-page 3
25XX160A/B
TABLE 1-2:
AC CHARACTERISTICS
AC CHARACTERISTICS
Industrial (I):
T
AMB = -40°C to +85°C
V
CC = 1.8V to 5.5V
Automotive (E): T
AMB = -40°C to +125°C VCC = 2.5V to 5.5V
Param.
No.
Sym.
Characteristic
Min.
Max.
Units
Test Conditions
1F
CLK
Clock Frequency
10
5
3
MHz
MHz
MHz
4.5V
≤ VCC ≤ 5.5V
2.5V
≤ VCC < 4.5V
1.8V
≤ VCC < 2.5V
2T
CSS
CS Setup Time
50
100
150
ns
ns
ns
4.5V
≤ VCC ≤ 5.5V
2.5V
≤ VCC < 4.5V
1.8V
≤ VCC < 2.5V
3T
CSH
CS Hold Time
100
200
250
ns
ns
ns
4.5V
≤ VCC ≤ 5.5V
2.5V
≤ VCC < 4.5V
1.8V
≤ VCC < 2.5V
4T
CSD
CS Disable Time
50
ns
5
Tsu
Data Setup Time
10
20
30
ns
ns
ns
4.5V
≤ VCC ≤ 5.5V
2.5V
≤ VCC < 4.5V
1.8V
≤ VCC < 2.5V
6T
HD
Data Hold Time
20
40
50
ns
ns
ns
4.5V
≤ VCC ≤ 5.5V
2.5V
≤ VCC < 4.5V
1.8V
≤ VCC < 2.5V
7T
R
CLK Rise Time
500
ns
(Note 1)
8T
F
CLK Fall Time
500
ns
(Note 1)
9T
HI
Clock High Time
50
100
150
ns
ns
ns
4.5V
≤ VCC ≤ 5.5V
2.5V
≤ VCC < 4.5V
1.8V
≤ VCC < 2.5V
10
T
LO
Clock Low Time
50
100
150
ns
ns
ns
4.5V
≤ VCC ≤ 5.5V
2.5V
≤ VCC < 4.5V
1.8V
≤ VCC < 2.5V
11
T
CLD
Clock Delay Time
50
ns
12
T
CLE
Clock Enable Time
50
ns
13
T
V
Output Valid from Clock
Low
50
100
160
ns
ns
ns
4.5V
≤ VCC ≤ 5.5V
2.5V
≤ VCC < 4.5V
1.8V
≤ VCC < 2.5V
14
T
HO
Output Hold Time
0
ns
(Note 1)
15
T
DIS
Output Disable Time
40
80
160
ns
ns
ns
4.5V
≤ VCC ≤ 5.5V (Note 1)
2.5V
≤ VCC ≤ 4.5V (Note 1)
1.8V
≤ VCC ≤ 2.5V (Note 1)
16
T
HS
HOLD Setup Time
20
40
80
ns
ns
ns
4.5V
≤ VCC ≤ 5.5V
2.5V
≤ VCC < 4.5V
1.8V
≤ VCC < 2.5V
Note 1: This parameter is periodically sampled and not 100% tested.
2: This parameter is not tested but ensured by characterization. For endurance estimates in a specific
application, please consult the Total Endurance™ Model which can be obtained from our web site:
www.microchip.com.
3: T
WC begins on the rising edge of CS after a valid write sequence and ends when the internal write cycle is
complete.


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