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DP83869HM Datasheet(PDF) 67 Page - Texas Instruments

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No. de pieza DP83869HM
Descripción Electrónicos  High Immunity 10/100/1000 Ethernet Physical Layer Transceiver With Copper and Fiber Interface
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Fabricante Electrónico  TI1 [Texas Instruments]
Página de inicio  http://www.ti.com
Logo TI1 - Texas Instruments

DP83869HM Datasheet(HTML) 67 Page - Texas Instruments

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DP83869HM
www.ti.com
SNLS614 – SEPTEMBER 2018
Product Folder Links: DP83869HM
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Copyright © 2018, Texas Instruments Incorporated
9.6.1.18 INTERRUPT_STATUS Register (Address = 0x13) [reset = 0x0]
INTERRUPT_STATUS is shown in Figure 42 and described in Table 39.
Return to Summary Table.
This register contains event status for the interrupt function. If an event has occurred since the last read of this
register, the corresponding status bit will be set. The status indications in this register will be set even if the
interrupt is not enabled.
Figure 42. INTERRUPT_STATUS Register
15
14
13
12
11
10
9
8
AUTONEG_ER
R
SPEED_CHNG
DUPLEX_MOD
E_CHNG
PAGE_RECEIV
ED
AUTONEG_CO
MP
LINK_STATUS
_CHNG
EEE_ERR_ST
ATUS
FALSE_CARRI
ER
RC-1b0
RC-1b0
RC-1b0
RC-1b0
RC-1b0
RC-1b0
R-1b0
RC-1b0
7
6
5
4
3
2
1
0
ADC_FIFO_OV
F_UNF
MDI_CROSSO
VER_CHNG
SPEED_OPT_
EVENT
SLEEP_MODE
_CHNG
WOL_STATUS
XGMII_ERR_S
TATUS
POLARITY_CH
NG
JABBER
RC-1b0
RC-1b0
RC-1b0
RC-1b0
R-1b0
R-1b0
R-1b0
RC-1b0
Table 39. INTERRUPT_STATUS Register Field Descriptions
Bit
Field
Type
Reset
Description
15
AUTONEG_ERR
RC
1b0
1 = Auto-Negotiation error has occurred 0 = Auto-Negotiation error
has not occurred THIS BIT IS LH (Latched-High)
14
SPEED_CHNG
RC
1b0
1 = Link speed has changed 0 = Link speed has not changed THIS
BIT IS LH (Latched-High)
13
DUPLEX_MODE_CHNG
RC
1b0
1 = Duplex mode has changed 0 = Duplex mode has not changed
THIS BIT IS LH (Latched-High)
12
PAGE_RECEIVED
RC
1b0
1 = Page has been received 0 = Page has not been received THIS
BIT IS LH (Latched-High)
11
AUTONEG_COMP
RC
1b0
1 = Auto-Negotiation has completed 0 = Auto-Negotiation has not
completed THIS BIT IS LH (Latched-High)
10
LINK_STATUS_CHNG
RC
1b0
1 = Link status has changed 0 = Link status has not changed THIS
BIT IS LH (Latched-High)
9
EEE_ERR_STATUS
R
1b0
1 = EEE error has been detected
8
FALSE_CARRIER
RC
1b0
1 = Enable interrupt 0 = Disable interrupt THIS BIT IS LH (Latched-
High)
7
ADC_FIFO_OVF_UNF
RC
1b0
1 = Overflow / underflow has been detected in one of ADC's FIFOs
THIS BIT IS LH (Latched-High)
6
MDI_CROSSOVER_CHN
G
RC
1b0
1 = MDI crossover has changed 0 = MDI crossover has not changed
THIS BIT IS LH (Latched-High)
5
SPEED_OPT_EVENT
RC
1b0
1 = MDI crossover has changed 0 = MDI crossover has not changed
THIS BIT IS LH (Latched-High)
4
SLEEP_MODE_CHNG
RC
1b0
1 = Sleep mode has changed 0 = Sleep mode has not changed
THIS BIT IS LH (Latched-High)
3
WOL_STATUS
R
1b0
1 = WoL (or pattern) packet has been received
2
XGMII_ERR_STATUS
R
1b0
1 = Overflow / underflow has been detected in one of GMII / RGMII /
SGMII buffers NOTE: this indication have issue, recommend to not
put on DS, unless proven otherwise on the lab, CDDS #475
1
POLARITY_CHNG
R
1b0
1 = Data polarity has changed 0 = Data polarity has not changed
THIS BIT IS LH (Latchde-High)
0
JABBER
RC
1b0
1 = Jabber detected 0 = Jabber not detected THIS BIT IS LH
(Latched-High)


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