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DS90UB962-Q1 Datasheet(PDF) 34 Page - Texas Instruments |
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DS90UB962-Q1 Datasheet(HTML) 34 Page - Texas Instruments |
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34 / 169 page  KEY: ST ± Start of Transmission PH ± Packet Header ET ± End of Transmission PF ± Packet Footer LPS ± Low Power State DATA: DATA DATA PF PH PH PF SP SP LPS ET ST LPS ET ST ST LPS ET ST ET Short Packet Long Packet Long Packet Short Packet FV LV TFV_LV 34 DS90UB962-Q1 SNLS573 – AUGUST 2018 www.ti.com Product Folder Links: DS90UB962-Q1 Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated Figure 18. Minimum FV to LV Table 11. Minimum FV to LV Setup Requirement (in Serializer PCLKs) MODE FV_MIN_TIME Conversion Factor Absolute Min (FV_MIN_TIME = 0) Default (FV_MIN_TIME = 128) RAW12 LF 1 2 130 RAW12 HF 1.5 3 195 RAW10 2 5 261 For other settings of FV_MIN_TIME, use Equation 1 to determine the required FV to LV setup in Serializer PCLKs. Absolute Min + (FV_MIN_TIME × Conversion factor) (1) 7.4.13 CSI-2 Protocol Layer The DS90UB962-Q1 implements High-Speed mode to forward CSI-2 Low Level Protocol data. This includes features as described in the Low Level Protocol section of the MIPI CSI-2 Specification. It supports short and long packet formats. The feature set of the protocol layer implemented by the CSI-2 TX is: • Transport of arbitrary data (payload-independent) • 8-bit word size • Support for up to four interleaved virtual channels on the same link • Special packets for frame start, frame end, line start, and line end information • Descriptor for the type, pixel depth, and format of the Application Specific Payload data • 16-bit Checksum Code for error detection Figure 19 shows the CSI-2 protocol layer with short and long packets. Figure 19. CSI-2 Protocol Layer With Short and Long Packets 7.4.14 CSI-2 Short Packet The short packet provides frame or line synchronization. Figure 20 shows the structure of a short packet. A short packet is identified by data types 0x00 to 0x0F. |
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