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CX65003 Datasheet(PDF) 6 Page - List of Unclassifed Manufacturers |
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CX65003 Datasheet(HTML) 6 Page - List of Unclassifed Manufacturers |
6 / 12 page DATA SHEET • CX65003 Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • sales@skyworksinc.com • www.skyworksinc.com 6 October 11, 2004 • Skyworks Proprietary and Confidential information • Products and Product Information are Subject to Change Without Notice • 101468E 30 35 40 45 50 2300 2350 2400 2450 2500 Freq (MHz) -40C 25C 85C Figure 15. Typical OIP3 From 2.3 to 2.5 GHz Over Temperature (Circuit Match for Optimum OIP3) -65 -60 -55 -50 -45 -40 10 12 14 16 18 20 22 Pout (dBm) Figure 17. Typical ACLR vs POUT @ 2.14 GHz, 5 MHz Offset, 25 °C (Circuit Match for Optimum ACPR) 30 35 40 45 50 55 -5 -4 -3 -2 -1 0 Pin (dBm) -40C 25C 85C Figure 16. Typical OIP3 vs PIN @ 1960 MHz Over Temperature (Circuit Match for Optimum OIP3) -70 -65 -60 -55 -50 -45 -40 11 13 15 17 19 21 23 Pout (dBm) Figure 18. Typical ACPR vs POUT @ 1.96 GHz, 885 kHz Offset, 25 °C (Circuit Match for Optimum ACPR) Evaluation Board Description The CX65003 Evaluation Board is used to test the performance of the CX65003 power amplifier driver. An Evaluation Board schematic diagram, optimized for the 3rd Order Output Intercept Point (OIP3), is shown in Figure 19. A schematic diagram optimized for Adjacent Channel Power Rejection (ACPR) is provided in Figure 20. The Evaluation Board assembly diagram is shown in Figure 21 and the Evaluation Board layer detail is shown in Figure 22. The mounting footprint for the CX65003 is shown in Figure 23. Circuit Design Configurations The following design considerations are general in nature and must be followed regardless of final use or configuration. 1. Paths to ground should be made as short as possible. 2. The ground pad of the CX65003 power amplifier has special electrical and thermal grounding requirements. This pad is the main thermal conduit for heat dissipation. Since the circuit board acts as the heat sink, it must shunt as much heat as possible from the amplifier. As such, design the connection to the ground pad to dissipate the maximum wattage produced to the circuit board. Multiple vias to the grounding layer are required. NOTE: Junction temperature (TJ) of the device increases with a poor connection to the slug and ground. This reduces the lifetime of the device. 3. External bypass capacitors are required on the VCC line and on pins 4, 5, and 8. 4. Bias resistor R1 is used to control the reference voltage of the bias circuit (VCC1) at pin 8. 5. Inductor L1 is placed between the bias circuit output (pin 4) and the base of RF transistor (pin 2) for bias circuit and RF transistor connection. Suggested matching circuits are shown in Figures 19 and 20. |
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