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MC100LVELT20 Datasheet(Hoja de datos) 1 Page - ON Semiconductor

No. de Pieza. MC100LVELT20
Descripción  3.3V LVTTL/LVCMOS to Differential LVPECL Translator
Descarga  6 Pages
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Fabricante  ONSEMI [ON Semiconductor]
Página de inicio  http://www.onsemi.com
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© Semiconductor Components Industries, LLC, 2004
September, 2004 − Rev. P1
1
Publication Order Number:
MC100LVELT20/D
MC100LVELT20
Product Preview
3.3VLVTTL/LVCMOS to
Differential LVPECL
Translator
The MC100LVELT20 is a 3.3 V TTL/CMOS to differential PECL
translator. Because PECL (Positive ECL) levels are used, only +3.3 V
and ground are required. The small outline SOIC−8 package and the
single gate of the MC100LVELT20 makes it ideal for those
applications where space, performance, and low power are at a
premium.
The 100 Series contains temperature compensation.
390 ps Typical Propagation Delay
Maximum Input Clock Frequency > 0.8 GHz Typical
Operating Range V
CC = 3.0 V to 3.6 V
with GND = 0 V
PNP TTL Input for Minimal Loading
Q Output will Default HIGH with Input Open
This document contains information on a product under development. ON Semiconductor
reserves the right to change or discontinue this product without notice.
A
= Assembly Location
L
= Wafer Lot
Y
= Year
W
= Work Week
MARKING
DIAGRAM
SO−8
D SUFFIX
CASE 751
*For additional marking information, refer to
Application Note AND8002/D.
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
ORDERING INFORMATION
http://onsemi.com
KVT20
ALYW
1
8
1
8




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