CY3650
PRELIMINARY
Document #: 38-08003 Rev. **
Page 2 of 5
Hardware Installation
The development system is simple to install and get running.
An enclosed 110 VAC wall transformer supplies power to the
board. (Alternatively, a lab power source can be used.) Once
the included software is installed on a Windows 3.1 or Win-
dows ‘95 PC, an RS-232 cable connects the board to that PC
to provide a full debug and monitoring environment. The cable
and adapters support both a 9-pin and a 25-pin serial port on
the PC.
Functional Overview
A block diagram of the development board is shown below,
illustrating the major system components and the user inter-
faces. The microcontroller, USB serial interface protocol en-
gine, and general purpose I/O logic are contained in FPGAs.
The board supports a family of Cypress USB ICs, with varying
amounts of on-chip EPROM, RAM, and I/O. Consult the indi-
vidual device data sheets for details of the IC being emulated.
The Program RAM allows users to download code into
on-board memory. This provides a quick and easy mechanism
for firmware modification. The firmware can be modified after
download by changing individual bytes of code through the
debug interface. The CY3650 board supports program mem-
ory sizes up to 4 KB and the CY3651 board supports program
memory sizes up to 8 KB; consult the data sheet of the actual
target device for the ROM size contained in the IC.
For stand-alone operation, user firmware can be burned into
the supplied UV-erasable EPROM, allowing for operation with-
out the PC attached.
USB Interface
The CY3650 and CY3651 development boards support the
low-speed (1.5 Mbps) USB mode, with a 1.5-k
Ω pull-up resis-
tor to +3.3V on the D
− line for proper operation.
The USB serial interface protocol engine contains the func-
tions commonly referred to as “Serial Interface Engine” and
“Serial Interface Logic” in USB literature. This provides full
functionality for connecting to a USB bus as a low-speed de-
vice, including endpoint control and automatic NAKing.
I/O Port Operation
The general-purpose I/O ports on the board all operate identi-
cally. As outputs, the ports provide either a (removable) weak
pull-up, or a strong pull-down. During a read operation, the
digital state of all bits of each port are read together. All bits
also have the capability to serve as interrupt inputs, as de-
scribed in the device data sheets.
The versatile 4-bit current-sink DAC per pin, available in many
Cypress USB family ICs, is not implemented on the board.
Support is available for customers who wish to fully emulate
this IC feature
Note: The input thresholds are lower (1.5 V) for the develop-
ment board than the USB parts (45%–65% VCC).
Power
Supply
Stand-Alone Environment
Development
Board
Target System