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MAX3523ETP Datasheet(PDF) 8 Page - Maxim Integrated Products

No. de Pieza. MAX3523ETP
Descripción  Low-Power DOCSIS 3.1 Programmable-Gain Amplifier
Descarga  12 Pages
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Fabricante  MAXIM [Maxim Integrated Products]
Página de inicio  http://www.maxim-ic.com
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MAX3523ETP Datasheet(HTML) 8 Page - Maxim Integrated Products

 
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Detailed Description
Programmable-Gain Amplifier
The programmable-gain amplifier (PGA) provides 60dB of
output level control in 1dB steps. The gain of the PGA is
determined by a 6-bit gain code (GC5–GC0) programmed
through the serial-data interface (see Register Map).
Specified performance is achieved when the input is
driven differentially.
Four power codes (PC1–PC0) allow the PGA to be used
with reduced bias current when distortion performance
can be relaxed. In addition, for each power code, bias current
is automatically reduced with gain code for maximum
efficiency.
The PGA features a differential Class A output stage
capable of driving an +68dBmV OFDMA signal from
5MHz–85MHz or two 96MHz +65dBmV OFDMA signals
from 5MHz–204MHz into a 75Ω load. This architecture
features a differential output that provides superior
even-order distortion performance. This requires that a
transformer be used to convert to a single-ended
output. In transmit-disable mode, the output amplifiers are
powered down, resulting in low output noise while
maintaining the impedance match.
3-Wire Serial Programmable Interface (SPI)
and Control Registers
The MAX3523 includes a user-programmable register for
initializing the part and setting the gain and power
consumption. The four MSBs are address bits; the eight
least significant bits (LSBs) are used for register data.
Data is shifted MSB first.
The serial interface should only be written to when TXEN = low,
as is the case between transmit bursts in a DOCSIS
environment. Once a new set of register data is clocked
in, the corresponding power code and/or gain code does
not take effect until the 12th rising edge of SCLK.
Note: The registers must be written no earlier than 100μs after
the device is powered up.
Typical Application Circuit
+
-
INPUT
VDD_CT
OUT+
OUT-
IN+
IN-
SCLK
SDA
CS
TXEN
ANTI-ALIA S
FILTER
VDD
VDD_CT
VDD
OUTPUT
75
Ω
VDD
N.C.
C2
0.01µF
C5
R7
T1
C8
L2
200
Ω
SERIAL INTERFACE
MAX3523
15
16
17
18
19
20
1
2
3
4
5
8
13
14
6
7
9
10
11
12
N.C.*
NOTES
1. N.C. PINS TO BE LEFT OPEN OR CONNECTED TO PCB GROUND FOR IMP ROVED HE AT DISSIP ATION.
2. N.C.* PINS MUST BE LEFT UNCONNECTED.
3. FOR COMPONENT VALUES, PLEA SE RE FER TO THE MAX3523 EV KIT DATA SHEET.
N.C.
N.C.
N.C.
N.C.
N.C.
C4
C14
0.01µF
R3
C7
L1
www.maximintegrated.com
Maxim Integrated │ 8
MAX3523
Low-Power DOCSIS 3.1
Programmable-Gain Amplifier


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