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GD5F1GQ4RF9IS Datasheet(PDF) 41 Page - GigaDevice Semiconductor (Beijing) Inc. |
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GD5F1GQ4RF9IS Datasheet(HTML) 41 Page - GigaDevice Semiconductor (Beijing) Inc. |
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41 / 59 page  SPI(x1/x2/x4) NAND Flash 1G 41 14.2 Block Protection The block lock feature provides the ability to protect the entire device, or ranges of blocks, from the PROGRAM and ERASE operations. After power-up, the device is in the “locked” state, i.e., feature bits BP0, BP1and BP2are set to 1, INV, CMP and BRWD are set to 0. To unlock all the blocks, or a range of blocks, the SET FEATURES command must be issued to alter the state of protection feature bits. When BRWD is set and WP# is LOW, none of the writable protection feature bits can be set. Also, when a PROGRAM/ERASE command is issued to a locked block, status bit OIP remains 0.When an ERASE command is issued to a locked block, the erase failure, 04H, is returned. When a PROGRAM command is issued to a locked block, program failure,08h is returned. Table14-1. Block Lock Register Block Protect Bits CMP INV BP2 BP1 BP0 Protect Row Address Protect Rows 1G x x 0 0 0 NONE None —all unlocked 0 0 0 0 1 FC00h ~ FFFFh Upper 1/64 locked 0 0 0 1 0 F800h ~ FFFFh Upper 1/32 locked 0 0 0 1 1 F000h ~ FFFFh Upper 1/16 locked 0 0 1 0 0 E000h ~ FFFFh Upper 1/8 locked 0 0 1 0 1 C000h ~ FFFFh Upper 1/4 locked 0 0 1 1 0 8000h ~ FFFFh Upper 1/2 locked x x 1 1 1 0000h ~ FFFFh All locked (default) 0 1 0 0 1 0000h ~ 03FFh Lower 1/64 locked 0 1 0 1 0 0000h ~ 07FFh Lower 1/32 locked 0 1 0 1 1 0000h ~ 0FFFh Lower 1/16 locked 0 1 1 0 0 0000h ~ 1FFFh Lower 1/8 locked 0 1 1 0 1 0000h ~ 3FFFh Lower 1/4 locked 0 1 1 1 0 0000h ~ 7FFFh Lower 1/2 locked 1 0 0 0 1 0000h ~ FBFFh Lower 63/64 locked 1 0 0 1 0 0000h ~ F7FFh Lower31/32 locked 1 0 0 1 1 0000h ~ EFFFh Lower 15/16 locked 1 0 1 0 0 0000h ~ DFFFh Lower7/8 locked 1 0 1 0 1 0000h ~ BFFFh Lower3/4 locked 1 0 1 1 0 0000h ~ 003Fh Block0 1 1 0 0 1 0400h ~ FFFFh Upper 63/64 locked 1 1 0 1 0 0800h ~ FFFFh Upper31/32 locked 1 1 0 1 1 1000h ~ FFFFh Upper 15/16 locked 1 1 1 0 0 2000h ~ FFFFh Upper7/8 locked 1 1 1 0 1 4000h ~ FFFFh Upper3/4 locked 1 1 1 1 0 0000h ~ 003Fh Block0 When WP# is not LOW, user can issue bellows commands to alter the protection states as want. • Issue SET FEATURES register write (1FH) • Issue the feature bit address (A0h) and the feature bits combination as the table |
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