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SST89E52RD2-40-C-NJE Datasheet(PDF) 15 Page - Silicon Storage Technology, Inc |
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SST89E52RD2-40-C-NJE Datasheet(HTML) 15 Page - Silicon Storage Technology, Inc |
15 / 91 page Preliminary Specifications FlashFlex51 MCU SST89E52RD2 / SST89E54RD2 / SST89E58RD2 / SST89E516RD2 SST89V52RD2 / SST89V54RD2 / SST89V58RD2 / SST89V516RD2 15 ©2004 Silicon Storage Technology, Inc. S71255-00-000 3/04 Expanded RAM Access (Indirect Addressing only): MOVX @DPTR, A ; DPTR contains 0A0H DPTR points to 0A0H and data in “A” is written to address 0A0H of the expanded RAM rather than external memory. Access to external memory higher than 2FFH using the MOVX instruction will access external memory (0300H to FFFFH) and will perform in the same way as the standard 8051, with P0 and P2 as data/address bus, and P3.6 and P3.7 as write and read timing signals. When EXTRAM = 1, MOVX @Ri and MOVX @DPTR will be similar to the standard 8051. Using MOVX @Ri pro- vides an 8-bit address with multiplexed data on Port 0. Other output port pins can be used to output higher order address bits. This provides external paging capabilities. Using MOVX @DPTR generates a 16-bit address. This allows external addressing up the 64K. Port 2 provides the high-order eight address bits (DPH), and Port 0 multiplexes the low order eight address bits (DPL) with data. Both MOVX @Ri and MOVX @DPTR generates the necessary read and write signals (P3.6 - WR# and P3.7 - RD#) for external memory use. Table 3-5 shows external data mem- ory RD#, WR# operation with EXTRAM bit. The stack pointer (SP) can be located anywhere within the 256 bytes of internal RAM (lower 128 bytes and upper 128 bytes). The stack pointer may not be located in any part of the expanded RAM. TABLE 3-5: EXTERNAL DATA MEMORY RD#, WR# WITH EXTRAM BIT MOVX @DPTR, A or MOVX A, @DPTR MOVX @Ri, A or MOVX A, @Ri AUXR ADDR < 0300H ADDR >= 0300H ADDR = Any EXTRAM = 0 RD# / WR# not asserted RD# / WR# asserted RD# / WR# not asserted1 1. Access limited to ERAM address within 0 to 0FFH; cannot access 100H to 02FFH. EXTRAM = 1 RD# / WR# asserted RD# / WR# asserted RD# / WR# asserted T3-5.0 1255 |
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