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SST89E54RD2-40-I-PJ Datasheet(PDF) 82 Page - Silicon Storage Technology, Inc |
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SST89E54RD2-40-I-PJ Datasheet(HTML) 82 Page - Silicon Storage Technology, Inc |
82 / 91 page 82 Preliminary Specifications FlashFlex51 MCU SST89E52RD2 / SST89E54RD2 / SST89E58RD2 / SST89E516RD2 SST89V52RD2 / SST89V54RD2 / SST89V58RD2 / SST89V516RD2 ©2004 Silicon Storage Technology, Inc. S71255-00-000 3/04 14.3 Flash Memory Programming Timing Diagrams with External Host Mode FIGURE 14-14: READ-ID Reads chip signature and identification registers at the addressed location. FIGURE 14-15: SELECT-BLOCK1 / SELECT-BLOCK0 (FOR SST89E516RD2/SST89V516RD2 ONLY) Enables the selection of either of the flash memory blocks prior to issuing a Byte-Verify, Block-Erase, Sector- Erase, or Byte-Program. 1255 F46.0 0030H TSU TES RST PSEN# ALE/PROG# EA# P3[5:4] ,P2[5:0] ,P1 P2[7:6] ,P3[7:6] P0 0000b TRD BFH 0031H 0000b TRD Device ID Device ID = See Table 4-3, "Product Identification" RST PSEN# ALE/PROG# EA# P3[3] P3[5:4], P2[5:0] A5H/55H TPSB TPROG TADS 1255 F47.0 P3[7:6], P2[7:6] 1001b TDH TSU TES |
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