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CAT34C02 Datasheet(PDF) 3 Page - Catalyst Semiconductor |
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CAT34C02 Datasheet(HTML) 3 Page - Catalyst Semiconductor |
3 / 17 page CAT34C02 3 Doc No. 1095, Rev. C © 2005 by Catalyst Semiconductor, Inc. Characteristics subject to change without notice A.C. CHARACTERISTICS VCC = 1.7 V to 5.5 V, TA = -40°C to 85°C, unless otherwise specified. Symbol Parameter 1.7 V - 5.5 V 2.5 V - 5.5 V Units Min Max Min Max FSCL Clock Frequency 100 400 kHz TI(1) Noise Suppression Time Constant at SCL, SDA Inputs 100 100 ns tAA(2) SCL Low to SDA Data Out 3.5 0.9 μs tBUF(1) Time the Bus Must be Free Before a New Transmission Can Start 4.7 1.3 μs tHD:STA Start Condition Hold Time 4 0.6 μs tLOW Clock Low Period 4.7 1.3 μs tHIGH Clock High Period 4 0.6 μs tSU:STA Start Condition Setup Time 4.7 0.6 μs tHD:DAT Data In Hold Time 0 0 ns tSU:DAT Data In Setup Time 250 100 ns tR(1) SDA and SCL Rise Time 1 0.3 μs tF(1) SDA and SCL Fall Time 300 300 ns tSU:STO Stop Condition Setup Time 4 0.6 μs tDH Data Out Hold Time 100 100 ns tWR Write Cycle Time 5 5 ms tPU(1), (3) Power-up to Ready Mode 1 1 ms Note: (1) This parameter is tested initially and after a design or process change that affects the parameter. (2) For timing measurements the SDA line capacitance is ~ 100 pF; the SCL input is driven with rise and fall times of < 50 ns; the SDA I/O is pulled-up by a 3 mA current source; input driving signals swing from 20% to 80% of VCC. Output level reference levels are 30% and respectively 70% of VCC. (3) tPU is the delay required from the time VCC is stable until the device is ready to accept commands. Power-On Reset (POR) The CAT34C02 incorporates Power-On Reset (POR) circuitry which protects the internal logic against powering up in the wrong state. The CAT34C02 will power up into Standby mode after VCC exceeds the POR trigger level and will power down into Reset mode when VCC drops below the POR trigger level. This bi-directional POR feature protects the device against ‘brown-out’ failure following a temporary loss of power. The POR circuitry triggers at the minimum VCC level required for proper initialization of the internal state machines. The POR trigger level automatically tracks the internal CMOS device thresholds, and is naturally well below the minimum recommended VCC supply voltage. |
Número de pieza similar - CAT34C02 |
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Descripción similar - CAT34C02 |
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