BH62UV1600 datasheet(4/9 Pages) BSI

No. de pieza	BH62UV1600

Descripción Electrónicos	Ultra Low Power/High Speed CMOS SRAM 2M X 8 bit

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Fabricante Electrónico	BSI [Brilliance Semiconductor]

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BSI

BH62UV1600

R0201-BH62UV1600

Revision

1.0

Jul.

2005

4

n LOW V

CC DATA RETENTION WAVEFORM (2) (CE2 Controlled)

n AC TEST CONDITIONS

(Test Load and Input/Output Reference)

Input Pulse Levels

VCC / 0V

Input Rise and Fall Times

1V/ns

Input and Output Timing

Reference Level

0.5Vcc

tCLZ1, tCLZ2, tOLZ, tCHZ1,

tCHZ2, tOHZ, tWHZ, tOW

CL = 5pF+1TTL

Output Load

Others

CL = 30pF+1TTL

1. Including jig and scope capacitance.

n KEY TO SWITCHING WAVEFORMS

WAVEFORM

INPUTS

OUTPUTS

MUST BE

STEADY

MUST BE

STEADY

MAY CHANGE

FROM

“H” TO “L”

WILL BE CHANGE

FROM

“H” TO “L”

MAY CHANGE

FROM

“L” TO “H”

WILL BE CHANGE

FROM

“L” TO “H”

DON

’T CARE

ANY CHANGE

PERMITTED

CHANGE :

STATE UNKNOW

DOES NOT

APPLY

CENTER LINE IS

HIGH INPEDANCE

“OFF” STATE

n AC ELECTRICAL CHARACTERISTICS (T

A = -25

OC to +85OC)

READ CYCLE

CYCLE TIME : 70ns

JEDEC

PARAMETER

NAME

PARANETER

NAME

DESCRIPTION

MIN.

TYP.

MAX.

UNITS

tAVAX

tRC

Read Cycle Time

70

--

ns

tAVQX

tAA

Address Access Time

--

70

ns

tE1LQV

tACS1

Chip Select Access Time

(CE1)

--

70

ns

tE2LQV

tACS2

Chip Select Access Time

(CE2)

--

70

ns

tGLQV

tOE

Output Enable to Output Valid

--

30

ns

tE1LQX

tCLZ1

Chip Select to Output Low Z

(CE1)

10

--

ns

tE2LQX

tCLZ2

Chip Select to Output Low Z

(CE2)

10

--

ns

tGLQX

tOLZ

Output Enable to Output Low Z

5

--

ns

tE1HQZ

tCHZ1

Chip Select to Output High Z

(CE1)

--

25

ns

tE2HQZ

tCHZ2

Chip Select to Output High Z

(CE2)

--

25

ns

tGHQZ

tOHZ

Output Enable to Output High Z

--

25

ns

tAVQX

tOH

Data Hold from Address Change

10

--

ns

CL

(1)

1 TTL

Output

ALL INPUT PULSES

→ ←

90%

VCC

GND

Rise Time:

1V/ns

Fall Time:

1V/ns

90%

→ ←

10%

CE2

Data Retention Mode

VCC

tCDR

VCC

tR

VIL

VCC

VDR≧1.0V

CE2≦0.2V

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