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ADUC846BCP8-5 Datasheet(PDF) 3 Page - Analog Devices |
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ADUC846BCP8-5 Datasheet(HTML) 3 Page - Analog Devices |
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3 / 20 page  ADuC846 REV. PrA -3- PRELIMINARY TECHNICAL DATA PARAMETER MIN TYP MAX UNITS CONDITION AUXILIARY ADC No Missing Codes2 16 Bits 20 Hz Update Rate Resolution 16 Bits Pk-Pk Range = ± 2.5V, 20Hz Update Rate Output Noise See Table XII in ADuC836 Datasheet Output Noise varies with selected Update Rates Integral Non Linearity ± 15 ppm of FSR 1 LSB16 Offset Error3 -2 LSB Offset Error Drift 1 µV /°C Fullscale Error4 -2.5 LSBs Gain Error Drift5 ± 0.5 ppm/°C Power Supply Rejection 80 dBs AIN=1V, Range=± 2.56V Normal Mode 50/60 Hz Rejection On AIN 60 dBs 50/60Hz ± 1Hz, 19.79Hz Update Rate On REFIN 60 dBs 50/60Hz ± 1Hz, 19.79Hz Update Rate AUXILIARY ADC ANALOG INPUTS Differential Input Voltage Ranges9, 10 (Bipolar Mode – ADC0CON3 = 0) ± REFIN V REFIN=REFIN(+)-REFIN(-) (or Int 1.25V Ref) (Unipolar Mode – ADC0CON3 = 1) 0 REFIN V REFIN=REFIN(+)-REFIN(-) (or Int 1.25V Ref) Average Analog Input Current 125 nA/V Analog Input Current Drift ± 2 pA/V/°C Absolute AIN Voltage Limits2, 11 AGND - 0.03 AVDD + 0.03 V ADC SYSTEM CALIBRATION Full Scale Calibration Limit +1.05 x FS V Zero Scale Calibration Limit -1.05 x FS V Input Span 0.8 x FS 2.1 x FS V DAC Voltage Range 0 VREF V DACCON.2 = 0 0 AVDD V DACCON.2 = 1 Resistive Load 10 k Ω From DAC Output to AGND Capactive Load 100 pF From DAC Output to AGND Output Impedance 0.5 Ω ISINK 50 µA DC Specifications7 Resolution 12 Relative Accuracy ± 3 LSBs Differential NonLinearity -1 Bit Guaranteed 12-Bit Monotonic Offset Error ± 50 mV Gain Error8 ± 1 % AVDD Range ± 1 % VREF Range AC Specifications2,7 Voltage Output Settling Time 15 us Setling time to 1LSB of final value Digital to Analog Glitch Energy 10 nVs 1 LSB change at major carry |
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