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M5M29KE131BTP Datasheet(PDF) 6 Page - Renesas Technology Corp

No. de pieza M5M29KE131BTP
Descripción Electrónicos  134,217,728-BIT (16,777,216-WORD BY 8-BIT / 8,388,608-WORD BY 16-BIT) CMOS FLASH MEMORY
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Fabricante Electrónico  RENESAS [Renesas Technology Corp]
Página de inicio  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

M5M29KE131BTP Datasheet(HTML) 6 Page - Renesas Technology Corp

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M5M29KE131BTP
Renesas LSIs
Rev.1.1_48a_bezz
6
134,217,728-BIT (16,777,216-WORD BY 8-BIT / 8,388,608-WORD BY 16-BIT)
CMOS FLASH MEMORY
Stacked-uMCP (micro Multi Chip Package)
We can normally read device identifier codes when Read
Device Identifier Code Command (90H) is written to the
command
latch.
Following
the
command
write,
the
manufacturer code and the device code can be read from
A0 address 0H and 1H in a bank address, respectively.
The device is in Read Array mode on initial device power
up and after exit from deep power down, or by writing FFH
to the Command User Interface. After starting the internal
operation the device is set to the read status register mode
automatically.
Automated block erase is initiated by writing the Block
Erase command of 20H followed by the Confirm
command of D0H.
An address within the block to be
erased is required.
The WSM executes iterative erase
pulse application and erase verify operation.
Page Program allows fast programming of 128words
/256bytes of data. Writing of 41H initiates the page
program operation for the Data area. From 2nd cycle to
129th cycle :Word Mode, 257th cycle :Byte Mode, write
data must be serially inputted. Address A6-A0:Word
Mode, A6-A-1:Byte Mode have to be incremented from
00H to 7FH. After completion of data loading, the WSM
controls the program pulse application and verify
operation.
Single data load to the page buffer is performed by
writing 74H followed by a second write specifying the
column address(A6-A0:Word Mode, A6-A-1:Byte Mode)
and data. Distinct data up to 128word/256bytes can be
loaded to the page buffer by this two-command sequence.
On the other hand, all of the loaded data to the page buffer
is programmed simultaneously by writing Page Buffer to
Flash command of 0EH followed by the confirm command
of D0H. After completion of programming the data on the
page buffer is cleared automatically.
The device operations are selected by writing specific
software command into the Command User Interface.
Software Command Definitions
The Status Register is read after writing the Read Status
Register command of 70H to the Command User Interface.
Also, after starting the internal operation the device is set to
the Read Status Register mode automatically.
The contents of Status Register are latched on the later
falling edge of OE# must be toggled every status read.
The Erase Status, Program Status and Block Status bits
are set to "1"s by the Write State Machine and can only
be reset by the Clear Status Register command of 50H.
These bits indicate various failure conditions.
Block Erase / Confirm Command (20H/D0H)
Clear Status Register Command (50H)
Read Array Command (FFH)
Read Status Register Command (70H)
Read Device Identifier Command (90H)
B) Page Program for Data Blocks (41H)
C) Single Data Load to Page Buffer (74H)
/ Page Buffer to Flash (0EH/D0H)
Word/Byte program is executed by a two-command
sequence. The Word/Byte program Setup command of
40H is written to the Command Interface, followed by a
second write specifying the address and data to be written.
The WSM controls the program pulse application and
verify operation.
A) Word / Byte Program (40H)
Program Commands
The Page Read command (F3H) timing can be used by
writing the first command to CUI and CE# falls VIL or
changing the address(A22-A2) is necessary to start
activating page read mode. This command is fast random
4 words read. During the read it is necessary to fix CE#
low and change addresses that are defined by A0 and
A1(0h - 3h) at random continuously. The mode is kept until
RP# is set to L or this chip is powered down.
The first read of Page Read timing is the same as normal
read (ta(CE)). CE# should be fallen “L”. The read timing
after the first is the same as ta(PAD).
In the page read mode the upper address(A22-A2) or
CE# are supposed not to be clocked during read operation.
Otherwise the access time is as same as normal read.
Page Read Command (F3H)


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