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DAC11001A Datasheet(PDF) 8 Page - Texas Instruments

No. de Pieza. DAC11001A
Descripción  DACx1001 20-Bit, 18-Bit, and 16-Bit, Low-Noise, Ultra-Low Harmonic Distortion, Fast-Settling, High-Voltage Output, Digital-to-Analog Converters (DACs)
Descarga  42 Pages
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Fabricante  TI1 [Texas Instruments]
Página de inicio  http://www.ti.com
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DAC11001A Datasheet(HTML) 8 Page - Texas Instruments

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DAC11001A, DAC91001, DAC81001
SLASEL0 – OCTOBER 2019
www.ti.com
Product Folder Links: DAC11001A DAC91001 DAC81001
Submit Documentation Feedback
Copyright © 2019, Texas Instruments Incorporated
Electrical Characteristics (continued)
at TA = –40°C to +125°C, VCC = +15 V, VSS = –15 V, AVDD = 5.5 V, DVDD = 3.3 V, IOVDD = 1.8 V, see note
(1) for V
REFPF and
VREFNF, OUT pin buffered with unity gain OPA827, ROFS, RCM, RFB unconnected, and all typical specifications at TA = 25°C,
(unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
(4)
Adaptive TnH mode. TnH action is disabled for large code steps. For small steps, TnH action happens with a hold time of 1.2µs.
Power supply rejection ratio (dc)
TA = 25°C, VCC = 15 V ± 20%,
VSS = –15 V
1.5
µV/V
TA = 25°C, VCC = 15 V,
VSS = –15 V ± 20%
1
VOLTAGE REFERENCE INPUT
Reference input impedance (REFPF)
DAC at midscale, VREFPF = 10 V,
VREFNF = 0 V
5.5
Reference input impedance (REFNF)
DAC at midscale, VREFPF = 10 V,
VREFNF = 0 V
7
Reference input capacitance (REFPF)
DAC at midscale, VREFPF = 10 V,
VREFNF = 0 V
TBD
pF
Reference input capacitance (REFNF)
DAC at midscale, VREFPF = 10 V,
VREFNF = 0 V
TBD
DYNAMIC PERFORMANCE
ts
Output voltage settling time(4)
VREFPF = 10 V, VREFNF = 0 V,
full-scale settling to 0.1%FSR
1
µs
VREFPF = 3 V, VREFNF = –10 V,
full-scale settling to 0.01%FSR
1.3
VREFPF = 10 V, VREFNF = 0 V,
full-scale settling to 0.01%FSR
1.3
VREFPF = 10 V, VREFNF = 0 V,
full-scale settling to ±1 LSB
2.5
VREFPF = 10 V, VREFNF = 0 V,
1-mV step settling to ±1 LSB
2.5
SR
Slew rate
VREFPF = 10 V, VREFNF = 0 V, full-scale
step, measured at OUT pin
50
V/µs
Power-on glitch magnitude
Measured at unbuffered DAC voltage
output, VREFPF = 10 V, VREFNF = 0 V
0.2
V
Vn
Output noise
0.1-Hz to 10-Hz, DAC at midscale,
VREFPF = 10 V, VREFNF = 0 V
0.4
µVpp
100-kHz bandwidth, DAC at midscale,
VREFPF = 10 V, VREFNF = 0 V
3
µVrms
Output noise density
Measured at 1 kHz, 10 kHz, 100 kHz,
DAC at mid scale, VREFPF = 10 V,
VREFNF = 0 V
7
nV/
√Hz
SFDR
Spurious free dynamic range
DAC update rate = 400 kHz, fOUT = 1
kHz, VOUTPP = 0 V to 10 V
–105
dB
DAC update rate = 400 kHz, fOUT = 1
kHz, VOUTPP = 3 V to –10 V
–105
dB
THD
Total harmonic distortion
DAC update rate = 400 kHz, fOUT = 1
kHz, VOUTPP = 0 V to 10 V
–105
dB
DAC update rate = 400 kHz, fOUT = 1
kHz, VOUTPP = 3 V to –10 V
–105
dB
Power supply rejection ratio (ac)
200-mV 50-Hz or 60-Hz sine wave
superimposed on VSS, VCC = 15 V
95
dB
200-mV 50 Hz or 60 Hz sine wave
superimposed on VCC, VSS = –15 V
95
dB
Code change glitch impulse
±1 LSB change around mid code
(including feedthrough), VREFPF = 10 V,
VREFNF = 0 V, measured at output of
buffer op amp
1.5
nV-s


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