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74AUP1G32GM Datasheet(PDF) 11 Page - NXP Semiconductors |
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74AUP1G32GM Datasheet(HTML) 11 Page - NXP Semiconductors |
11 / 16 page 9397 750 14678 © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Product data sheet Rev. 01 — 2 August 2005 11 of 16 Philips Semiconductors 74AUP1G32 Low-power 2-input OR gate [1] For measuring enable and disable times RL =5kΩ, for measuring propagation delays, setup and hold times and pulse width RL = 1 MΩ. Test data is given in Table 12. Definitions for test circuit: RL = Load resistor. CL = Load capacitance including jig and probe capacitance RT = Termination resistance should be equal to the output impedance Zo of the pulse generator Fig 7. Load circuitry for switching times Table 12: Test data Supply voltage Load VEXT VCC CL RL [1] tPLH, tPHL tPZH, tPHZ tPZL, tPLZ 0.8 V to 3.6 V 5 pF, 10 pF, 15 pF and 30 pF 5 k Ω or 1 MΩ open GND 2 × VCC 001aac521 PULSE GENERATOR DUT RT VI VO VEXT VCC RL 5 k Ω CL |
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