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CS5321-BL Datasheet(PDF) 1 Page - Cirrus Logic |
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CS5321-BL Datasheet(HTML) 1 Page - Cirrus Logic |
1 / 36 page Copyright © Cirrus Logic, Inc. 2005 (All Rights Reserved) http://www.cirrus.com CS5321/22 24-bit, Variable-bandwidth A/D Converter Chipset Features CMOS A/D Converter Chipset Dynamic Range - 130 dB @ 25 Hz Bandwidth - 121 dB @ 411 Hz Bandwidth Delta-sigma Architecture - Fourth-order Modulator - Variable Oversampling: 64X to 4096X - Internal Track-and-hold Amplifier CS5321 Signal-to-distortion: 115 dB Clock-jitter-tolerant Architecture Input Voltage Range: +4.5 V Flexible Filter Chip - Hardware- or Software-selectable Options - Seven Selectable Filter Corners (-3 dB) Frequencies: 25, 51, 102, 205, 411, 824 and 1650 Hz Low Power Dissipation: <100 mW Description The CS5321/CS5322 chipset functions as a unique A/D converter intended for very high-resolution measurement of signals below 1600 Hz. It is specif- ically designed for applications that require both a high dynamic range and a low total harmonic distor- tion. The chipset performs sampling, A/D conversion, and anti-alias filtering. The CS5321 uses Delta-Sigma modulation to pro- duce highly accurate conversions. The ∆Σ modulator oversamples, virtually eliminating the need for external analog anti-alias filters. The CS5322 linear-phase FIR digital filter decimates the output to any one of seven selectable update peri- ods: 16, 8, 4, 2, 1, 0.5, and 0.25 milliseconds. Data is output from the digital filter in a 24-bit serial format. ORDERING INFORMATION See page 36. RSEL Vdd1 AINR AIN+ AIN- Vss1 AGND Analog Modulator MDATA MCLK MFLG RESET R/W H/S SCLK SID SOD ERROR DRDY ORCAL DECA DECB DECC CS CLKIN SYNC VD+ TDATA PWDN USEOR DGND VD+ DGND CSEL Digital Filter CS5321 CS5322 Vss2 DGND Vdd2 LPWR OFST MDATA HBR MSYNC VREF+ VREF- SEP ‘05 DS454F2 |
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