8

FN7451.1

September 21, 2005

CIRCUIT 1

CIRCUIT 2

CIRCUIT 3

CIRCUIT 4

PIN NUMBER

PIN NAME

EQUIVALENT

CIRCUIT

DESCRIPTION

IN

V+

V-

LOGICPIN

V+

V-

GND.

33k

21k

+

-

1.2V

V+

V-

OUT

V-

V+

CAPACITIVELY

COUPLED

ESD CLAMP

GND

AC Test Circuits

FIGURE 21A. TEST CIRCUIT WITH OPTIMAL OUTPUT LOAD

FIGURE 21B. TEST CIRCUIT FOR MEASURING WITH A 50

Ω OR

75

Ω INPUT TERMINATED EQUIPMENT

WILL BE DEGRADED.

Figure 21A illustrates the optimum output load for testing AC performance. Figure 21B illustrates the optimum output load when

connecting to input terminated equipment. Figure 21C illustrates back loaded test circuit for video cable.

ISL59444

50

Ω

500

Ω

2pF

or

75

Ω

ISL59444

475

Ω

TEST

2pF

50

Ω

or

75

Ω

50

Ω

or

75

Ω

50

Ω

or

75

Ω

EQUIPMENT

ISL59444

50

Ω or 75Ω

TEST

2pF

50

Ω

or

75

Ω

50

Ω

or

75

Ω

EQUIPMENT

ISL59444