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TLE75242-ESD Datasheet(PDF) 35 Page - Infineon Technologies AG

No. de pieza TLE75242-ESD
Descripción Electrónicos  SPIDER 12V SPI Driver for Enhanced Relay Control
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Fabricante Electrónico  INFINEON [Infineon Technologies AG]
Página de inicio  http://www.infineon.com
Logo INFINEON - Infineon Technologies AG

TLE75242-ESD Datasheet(HTML) 35 Page - Infineon Technologies AG

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Datasheet
35
Rev. 1.0
2017-11-23
TLE75242-ESD
SPIDER+ 12V
Power Stages
Figure 19 Output Clamp concept
7.1.3
Maximum Load Inductance
During demagnetization of inductive loads, energy has to be dissipated in the TLE75242-ESD. Equation (7.1)
shows how to calculate the energy for low-side switches, while Equation (7.2) and Equation (7.3) can be
used for high-side switches (auto-configurable switches can use all equations, depending on the load
position):
(7.1)
(7.2)
(7.3)
The maximum energy, which is converted into heat, is limited by the thermal design of the component. The
EAR value provided in Table 2 assumes that all channels can dissipate the same energy when the inductances
connected to the outputs are demagnetized at the same time.
7.2
Inverse Current Behavior
During inverse current (VOUTn_S > VOUTn_D) in high-side configuration or (VOUTn > VSn) the affected channels stays
in ON- or in OFF- state. Furthermore, during applied inverse currents the ERRn bit can be set if the channel is
in ON-state and the over temperature threshold is reached.
The general functionality (switch ON and OFF, protection, diagnostic) of unaffected channels is not influenced
by inverse currents applied to other channels. Parameter deviations are possible especially for the following
ones (Over Temperature protection is not influenced):
• Switching capability: tON, tOFF, dV/dtON, -dV/dtOFF
•Protection: IL(OVL0), IL(OVL1)
PowerStage_HS.emf
High-side
Channel
VS
L,
R
L
VOUTn
IL_S
VOUT(CL)
VDS(CL)
IL
VSn
OUTn
VDS
GND
EVDS CL
()
VS VDS CL
()
RL
---------------------------------
1
RL I
L
VS VDS CL
()
---------------------------------
⎝⎠
⎛⎞ I
L
+
ln
L
RL
------
⋅⋅
=
EVS V
OUTS CL
()
()
VOUTS CL
()
RL
---------------------------
1
RL I
L
VOUTS CL
()
---------------------------
⎝⎠
⎛⎞ I
L
+
ln
L
RL
------
⋅⋅
=
EVS V
OUT CL
()
()
VOUT CL
()
RL
------------------------
1
RL I
L
VOUT CL
()
------------------------
⎝⎠
⎛⎞ I
L
+
ln
L
RL
------
⋅⋅
=


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