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TEA2095T Datasheet(PDF) 5 Page - NXP Semiconductors |
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TEA2095T Datasheet(HTML) 5 Page - NXP Semiconductors |
5 / 19 page NXP Semiconductors TEA2095T GreenChip dual synchronous rectifier controller TEA2095T All information provided in this document is subject to legal disclaimers. © NXP B.V. 2020. All rights reserved. Product data sheet Rev. 1.1 — 10 April 2020 5 / 19 8 Functional description 8.1 Introduction The TEA2095T is a controller IC for synchronous rectification. It is perfectly suited to be used in resonant applications. It can drive two synchronous rectifier MOSFETs on the secondary side of the central tap transformer winding. Figure 3 shows a typical configuration. aaa-016991 DSA GDA SSA DSB VCC GDB SSB GND Qprim1 CHB Qprim2 Qsec1 PRIMARY SIDE CONTROLLER IC Vin Vout TR IC1 Qsec2 Cout Figure 3. TEA2095T typical configuration 8.2 Start-up and undervoltage lockout (VCC pin) When the voltage on the VCC pin exceeds Vstart, the IC leaves the UVLO state and activates the SR circuitry. When the voltage drops to below Vstop, the IC reenters the UVLO state. The SR MOSFET gate driver outputs are actively kept low. For proper operation, the VCC pin must be decoupled with an extra capacitor (not only with Cout) between the VCC pin and the GND pin. To reduce inductance effects because of high gate driver currents, the extra capacitor must be connected as close as possible to the IC. 8.3 Drain sense (DSA and DSB pins) The drain sense pins are input pins capable of handling input voltages up to 120 V. At positive drain sense voltages, the gate driver is in off-mode with pulled-down gate driver pins (pins GDA or GDB). At negative drain sense voltages, the IC enables the SR through sensing the drain source differential voltage. |
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