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BQ24160 Datasheet(PDF) 31 Page - Texas Instruments |
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BQ24160 Datasheet(HTML) 31 Page - Texas Instruments |
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31 / 53 page  31 bq24160, bq24160A, bq24161 bq24161B, bq24163, bq24168 www.ti.com SLUSAO0G – NOVEMBER 2011 – REVISED DECEMBER 2015 Product Folder Links: bq24160 bq24160A bq24161 bq24161B bq24163 bq24168 Submit Documentation Feedback Copyright © 2011–2015, Texas Instruments Incorporated RESET Bit The RESET bit in the control register (0x02h) is used to reset all the charge parameters. Write “1” to RESET bit to reset all the registers to default values and place the bq2416xx into DEFAULT mode and turn off the watchdog timer. The RESET bit is automatically cleared to zero once the bq2416xx enters DEFAULT mode. CE Bit (Charge Enable) The CE bit in the control register (0x02h) is used to disable or enable the charge process. A low logic level (0) on this bit enables the charge and a high logic level (1) disables the charge. When charge is disabled, the SYS output regulates to VSYS(REG) and battery is disconnected from the SYS. Supplement mode is still available if the system load demands cannot be met by the supply. HZ_MODE Bit (High Impedance Mode Enable) The HZ_MODE bit in the control register (0x02h) is used to disable or enable the high impedance mode. A low logic level (0) on this bit enables the IC and a high logic level (1) puts the IC in a low quiescent current state called high impedance mode. When in high impedance mode, the converter is off and the battery FET and BGATE are on. The load on SYS is supplied by the battery. 9.6.4 Control/Battery Voltage Register (READ/WRITE) Memory location: 03, Reset state: 0001 0100 BIT NAME Read/Write FUNCTION B7 (MSB) VBREG5 Read/Write Battery Regulation Voltage: 640 mV (default 0) B6 VBREG4 Read/Write Battery Regulation Voltage: 320 mV (default 0) B5 VBREG3 Read/Write Battery Regulation Voltage: 160 mV (default 0) B4 VBREG2 Read/Write Battery Regulation Voltage: 80 mV (default 1) B3 VBREG1 Read/Write Battery Regulation Voltage: 40 mV (default 0) B2 VBREG0 Read/Write Battery Regulation Voltage: 20 mV (default 1) B1 IINLIMIT Read/Write Input Limit for IN input- 0 – 1.5A 1 – 2.5A (default 0) B0 (LSB) D+/D–_EN Read/Write 0 – Normal state, D+/D- Detection done 1 – Force D+/D– Detection. Returns to “0” after detection is done. (default 0) • Charge voltage range is 3.5V–4.44V with the offset of 3.5V and step of 20mV (default 3.6V). • Before writing to increase VBATREG register following a BATOVP event (e.g., IN or USB voltage is applied, IC remains in DEFAULT mode and then VBAT>3.6V is attached), toggle the HiZ bit or CD pin to clear the BATOVP fault. 9.6.5 Vender/Part/Revision Register (READ only) Memory location: 04, Reset state: 0100 0000 BIT NAME Read/Write FUNCTION B7 (MSB) Vender2 Read only Vender Code: bit 2 (default 0) B6 Vender1 Read only Vender Code: bit 1 (default 1) B5 Vender0 Read only Vender Code: bit 0 (default 0) B4 PN1 Read only For I2C Address 6Bh: 00: bq2416xx 01–11: Future product spins B3 PN0 Read only |
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