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DRV8714-Q1 Datasheet(PDF) 37 Page - Texas Instruments |
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DRV8714-Q1 Datasheet(HTML) 37 Page - Texas Instruments |
37 / 144 page IDRVP IPRE_CHG IPST_CHG VSHx_L VSHx_H tDON tPRE_CHG tPST_CHG VGSHx IGHx VSHx ISTRONG IHOLD QGD tDRIVE Figure 8-13. PDR Charge Profile IDRVN IPRE_DCHG IPST_DCHG VSHx_L VSHx_H tDOFF tPRE_DCHG tPST_DCHG VGSHx IGHx VSHx ISTRONG IHOLD QGD tDRIVE Figure 8-14. PDR Discharge Profile By default, the PDR loop automatically detects which MOSFET is the drive MOSFET and which MOSFET is the freewheel MOSFET by determining the polarity of the current out of the half-bridge. This is done by measuring the half-bridge VSHx voltage during the dead-time period to determine if the high-side or low-side body diode is conducting. If the current polarity cannot be determined it is assumed that the configured MOSFET through PWMx_HL is the drive MOSFET. The automatic freewheel detection can be disabled with the IDIR_MAN_x control register. In the manual freewheel modes, the PDR loop relies on the PWMx_HL control register to determine which MOSFET is the drive MOSFET and which MOSFET is the freewheel MOSFET. IF PWMx_HL = 0b, the high-side MOSFET is the drive MOSFET and the low-side MOSFET is the freewheel MOSFET. If PWMx_HL = 1b, the low-side MOSFET is the drive MOSFET and high-side MOSFET is the freewheel MOSFET. The PDR pre-charge is setup in a series of sequential steps. • Set the active half-bridge that will receive PWM control through the SET_AGD_xx register setting (DRV8718- Q1 only). The advance driver control settings are shared between each half-bridge pair (1/2, 3/4, 5/6, and 7/8) for DRV8718-Q1. • Set the target tON and tOFF time period through the TDON_DOFF_xx register setting. • Optionally: Adjust the PRE_MAX_xx, T_PRE_CHR_xx, T_PRE_DCHR_xx, PRE_CHR_INIT_xx, PRE_DCHR_INIT_xx register settings as needed. • Enable the PDR pre-charge control through the KP_PDR_xx register setting. A non-zero value will enable the function. • KP_PDR_xx sets the gain of the proportional controller for adjusting IPRE_CHR and IPRE_DCHR. It is recommended to start at a setting of 1 and increase as required. The PDR post-charge is setup in a series of sequential steps. • Set the active half-bridge that will receive PWM control through the SET_AGD_xx register setting (DRV8718- Q1 only). The advance driver control settings are shared between each half-bridge pair (1/2, 3/4, 5/6, and 7/8) for DRV8718-Q1. • Optionally: Enable the EN_PST_DLY_xx register setting as needed. • Enable the PDR post-charge control through the KP_PST_xx register setting. A non-zero value will enable the function. • KP_PST_xx sets the gain of the proportional controller for adjusting IPST_CHR and IPST_DCHR. It is recommended to start at a setting of 1 and increase as required. www.ti.com DRV8714-Q1, DRV8718-Q1 SLVSEA2 – AUGUST 2020 Copyright © 2020 Texas Instruments Incorporated Submit Document Feedback 37 Product Folder Links: DRV8714-Q1 DRV8718-Q1 |
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