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IN74LV139 Datasheet(PDF) 6 Page - Integral Corp. |
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IN74LV139 Datasheet(HTML) 6 Page - Integral Corp. |
6 / 6 page IN74LV139 6 INTEGRAL CHIP PAD DIAGRAM Location of marking (mm): left lower corner x = 0.950, y = 0.130; Thickness of chip:0.46 ± 0.02 mm PAD LOCATION Pad No. Pad Name X Y Pad size (mm) 01 Ea 0.1245 0.4625 0.100 x 0.100 02 A0a 0.1245 0.1290 0.100 x 0.100 03 A1a 0.2920 0.1290 0.100 x 0.100 04 Y0a 0.5480 0.1290 0.100 x 0.100 05 Y1a 0.7520 0.1290 0.100 x 0.100 06 Y2a 1.2830 0.1290 0.100 x 0.100 07 Y3a 1.4845 0.1845 0.100 x 0.100 08 GND 1.4840 0.6770 0.100 x 0.100 09 Y3b 1.4845 1.1720 0.100 x 0.100 10 Y2b 1.2830 1.2265 0.100 x 0.100 11 Y1b 0.7520 1.2265 0.100 x 0.100 12 Y0b 0.5480 1.2265 0.100 x 0.100 13 A1b 0.2920 1.2265 0.100 x 0.100 14 A0b 0.1245 1.2265 0.100 x 0.100 15 Eb 0.1245 0.8930 0.100 x 0.100 16 Vcc 0.1245 0.6650 0.100 x 0.100 ∗ Note: Pad location is given as per passivation layer 12 10 13 14 15 16 01 09 08 07 06 05 04 03 02 11 X Y 1.70+-0.03 0 Chip marking LV139 |
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