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UPD703103A Datasheet(PDF) 45 Page - NEC

No. de Pieza. UPD703103A
Descripción  32-Bit Single-Chip Microcontrollers
Descarga  99 Pages
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Fabricante  NEC [NEC]
Página de inicio  http://www.nec.com/
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UPD703103A Datasheet(HTML) 45 Page - NEC

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CHAPTER 3 SPECIFICATIONS OF PCI HOST BRIDGE MACRO
Application Note U17121EJ1V1AN
45
3.6 Initializing PCI Host Bridge Macro
The PCI host bridge macro must be initialized according to the following procedure to acknowledge memory
access and I/O access to the PCI bus and main memory (SDRAM) access from the PCI device.
Figure 3-5. Initializing PCI Host Bridge Macro
Internal PCI bus
reset released
PCI_CONTROL register
Set PCI_RESET bit to 1
Main memory (SDRAM)
area setting
PCI bus control setting
PCI I/O area setting
PCI memory area setting
PCI_MEM_BASE register
Set any address to M_BASE field
PCI_I/O_BASE register
Set any address to I/O_BASE field
PCI_CONTROL register
Set MEM_EN and IO_EN bits to 11
SDRAM_CTL register
Set bit width of column address to COLUMN_SIZE field
Set number of wait clocks to WAIT_STATE field
Set CAS latency to CAS_LATENCY field
Set BUS_SIZE bit to bit width of data bus
Set latency between successive accesses to CYCLE_LATENCY field
SYSTEM_MEM_BASE register
Set any address to S_BASE field
SYSTEM_MEM_RANGE register
Set any value to S_RANGE field
PCI_CONTROL register
Set TARGET_EN bit to 1
Set required bit of PCI_REQ field to 1
SDRAM control setting


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