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UPD703103A Datasheet(PDF) 79 Page - NEC

No. de Pieza. UPD703103A
Descripción  32-Bit Single-Chip Microcontrollers
Descarga  99 Pages
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Fabricante  NEC [NEC]
Página de inicio  http://www.nec.com/
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UPD703103A Datasheet(HTML) 79 Page - NEC

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CHAPTER 5 APPLICATION EXAMPLES
Application Note U17121EJ1V1AN
79
5.5.5 IDE HDD access sample program list
///////////////////////////////////////////////////////////////////////////////
//
IDE HDD access sample
//
//
Overview: Issues ATA commands to HDD, which is ATA device, via PCI-IDE //
//
ASIC board connected to PCI slot of evaluation board.
//
//
ATA commands to be issued are as follows.
//
//
//
//
IDLE IMMEDIATE, IDENTIFY DEVICE, SET FEATURE,
//
//
READ SECTOR(S), WRITE SECTOR(S), READ DMA, WRITE DMA
//
//
//
//
ATA command is executed by executing device selection
//
//
protocol to determine that command is issued to either
//
//
Master Device or Slave Device.
ATA command is issued
//
//
and data is transferred using transfer protocol
//
//
corresponding to each ATA command.
Four transfer
//
//
protocols, PIO datain transfer, PIO dataout transfer,
//
//
PIO nondata transfer, and DMA transfer, are available.
//
//
//
//
This sample program is provided with device selection
//
//
protocol and four transfer protocols as functions.
//
//
Corresponding transfer protocol function is called
//
//
from function processing each ATA command.
//
//
//
///////////////////////////////////////////////////////////////////////////////
/////////////////////////////////////////////////////
//
PCI-IDE ASIC board register address definition //
/////////////////////////////////////////////////////
//////////////////////
// IDE Command Area //
//////////////////////
#define IDEREG_DATA
((VUWORD*)(BASE_ADDRESS_PCI_IO + 0x00))
#define IDEREG_ERROR
((VUBYTE*)(BASE_ADDRESS_PCI_IO + 0x01))
#define IDEREG_ERROR_ERR_BIT
(0x01)
#define IDEREG_FEATURES
((VUBYTE*)(BASE_ADDRESS_PCI_IO + 0x01))
#define IDEREG_SECTOR_COUNT
((VUBYTE*)(BASE_ADDRESS_PCI_IO + 0x02))
#define IDEREG_SECTOR_NUMBER
((VUBYTE*)(BASE_ADDRESS_PCI_IO + 0x03))
#define IDEREG_CYLINDER_LOW
((VUBYTE*)(BASE_ADDRESS_PCI_IO + 0x04))
#define IDEREG_CYLINDER_HIGH
((VUBYTE*)(BASE_ADDRESS_PCI_IO + 0x05))
#define IDEREG_DEVICE_HEAD
((VUBYTE*)(BASE_ADDRESS_PCI_IO + 0x06))
#define IDEREG_STATUS
((VUBYTE*)(BASE_ADDRESS_PCI_IO + 0x07))
#define IDEREG_COMMAND
((VUBYTE*)(BASE_ADDRESS_PCI_IO + 0x07))
//////////////////////
// IDE Control Area //
//////////////////////


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