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UPD703106A Datasheet(PDF) 82 Page - NEC |
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UPD703106A Datasheet(HTML) 82 Page - NEC |
82 / 99 page CHAPTER 5 APPLICATION EXAMPLES Application Note U17121EJ1V1AN 82 // when Parity Error is detected. // bit 2 : Bus Master = 1b : Enable PCI Bus Master transfer // bit 0 : IO Space = 1b : Enable IO access to PCI-IDE ASIC board PCI_ConfigWrite(ConfigAddress, ConfigData); //////////////////////////// // Setting DES to disable // //////////////////////////// ConfigAddress = 0x40000058; // bit 31-11 : IDSEL specification = 010000000000000000000b // Select PCI device connected to AD30 // bit 10-08 : Function number = 00b // bit 07-02 : Register number = 22 (010110b), // -> IDE Bus Master Control // (In the case of PCI-IDE ASIC board used in this application) // bit 01-00 : 00b (fixed) // IDE Bus Master Control // Disable DES (Set bit16 des_on to 0) ConfigData = PCI_ConfigRead(ConfigAddress); PCI_ConfigWrite(ConfigAddress, ConfigData & 0xFFFEFFFF); /////////////////////////////////////////// // Setting of Interrupt Control register // /////////////////////////////////////////// *IDEREG_INTERRUPT_CONTROL &= 0xFFFCFFFF; // bit 17 : PCI Bus Master End Interrupt Mask = 0b (Interrupt enabled) // bit 16 : PCI I/F Interrupt Mask = 0b (Interrupt enabled) //////////////////////////////////////// // Setting of Device Command register // //////////////////////////////////////// *IDEREG_DEVICE_CONTROL = 0x00; // bit 2 : nIEN = 0b (Set INTRQ signal to enable) /////////////////// // IDE Bus reset // /////////////////// ConfigAddress = 0x40000044; // bit 31-11 : IDSEL specification = 010000000000000000000b // Select PCI device connected to AD30 // bit 10-08 : Function number = 00b // bit 07-02 : Register number = 17 (010001b), // -> IDE Reset Register // (In the case of PCI-IDE ASIC board used in this application) // bit 01-00 : 00b (fixed) |
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