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VT82C686B
Revision 1.71 June 9, 2000
-73-
Function 1 Registers - Enhanced IDE Controller
7HFKQRORJLHV ,QF
'HOLYHULQJ 9DOXH
'HOLYHULQJ 9DOXH
Offset 70 – Primary IDE Status .......................................RW
7
Interrupt Status
6
Prefetch Buffer Status
5
Post Write Buffer Status
4
DMA Read Prefetch Status
3
DMA Write Prefetch Status
2
S/G Operation Complete
1
FIFO Empty Status
0
Response to External DMAREQ
Offset 71 – Primary Interrupt Control............................RW
7-1
Reserved
........................................ always reads 0
0
Flush FIFO Before Generating IDE Interrupt
0
Disable ...................................................default
1Enable
Offset 78 – Secondary IDE Status ................................... RW
7
Interrupt Status
6
Prefetch Buffer Status
5
Post Write Buffer Status
4
DMA Read Prefetch Status
3
DMA Write Prefetch Status
2
S/G Operation Complete
1
FIFO Empty Status
0
Response to External DMAREQ
Offset 79 - Secondary Interrupt Control ........................ RW
7-1
Reserved
........................................ always reads 0
0
Flush FIFO Before Generating IDE Interrupt
0
Disable................................................... default
1Enable