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VT8601 Datasheet(PDF) 3 Page - List of Unclassifed Manufacturers

No. de Pieza. VT8601
Descripción  Single-Chip Slot-1 / Socket-370 PCI North Bridge With Integrated AGP 2D / 3D Graphics Accelerator and Advanced Memory Controller
Descarga  144 Pages
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Fabricante  ETC1 [List of Unclassifed Manufacturers]
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VT8601 Datasheet(HTML) 3 Page - List of Unclassifed Manufacturers

 
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VT8601 Apollo ProMedia
Revision 1.3 September 8, 1999
-i-
Revision History
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REVISION HISTORY
Document Release
Date
Revision
Initials
0.92
12/9/98
Initial internal release based on Apollo MVP4 data sheet revision 0.92
Added preliminary pin diagram based on engineering ballout rev 0.3 11/10/98
Added Slot-1 pinouts from Apollo Pro Plus Data Sheet
Replaced feature list, overview, and vblock diagram from product brief
DH
0.93
12/16/98
Updated pinouts to match engineering rev 0.5 document dated 12/1/98
DH
0.94
1/20/99
Updated pinouts to match engineering rev 0.8 document dated 12/22/98
DH
1.0
6/4/99
Added 133 MHz Support to Feature Bullets
Updated / Fixed Pin Descriptions:
Fixed description of strap options on MA2, MA8, and MA11-14
Removed Auxiliary Memory Port
Added REQ/GNT[4-7]#
Added GND & VCC3 pins to increase pin count to 510 (updated mech spec)
Fixed definitions of RESET# & CRSTI# and changed CRSTI# to CPURSTD#
Removed PWRGD function from SERR#
Fixed definitions of SRAS#, SCAS#, and SWE#
Added note to PLLTST description
Updated Device 0 Registers Rx50-53, 68[4], 69, 6B[5-1], 6C[7-4], 70[3,0,
72[0], 76[7], 79[1-0], 7A (added)
Updated Device 1 Registers Rx41[0], 42[0]
DH
1.1
6/23/99
Updated feature bullets & overview and fixed misc formatting problems
Fixed REQ/GNT4# pinouts and CKE & DQM naming polarity
Device 0 Bus 0 updated Rx2-3 Device ID, 69[7-6], 6D[6-5], 76[6]
Device 0 Bus 0 added Rx2C-D, 2E-F, 50[1], 51[5], 53[2], removed 6E-6F
Device 0 Bus 1 updated Rx0-3 Vendor & Device ID, Rx7-6[7]
Removed AC timing specs
DH
1.11
7/8/99
Fixed pin descriptions of CPURSTD# and SUSP
DH
1.2
8/23/99
Fixed typo in device 0 Rx50[7] description; added comment about default state
Fixed system frequency divider settings (MA pin descriptions, Dev 0 Rx68[1-0])
DH
1.3
9/8/99
Fixed strap options on MA2-6 and MA13 pin descriptions
Fixed Device 0 Rx52[7] strap option and removed (reserved) Device 0 Rx52[5]
Removed “VIA Confidential” watermark
DH


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