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GT50NR21 Datasheet(PDF) 5 Page - Toshiba Semiconductor |
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GT50NR21 Datasheet(HTML) 5 Page - Toshiba Semiconductor |
5 / 8 page GT50NR21 5 Fig. Fig. Fig. Fig. 8.7 8.7 8.7 8.7 C - V C - V C - V C - VCE CE CE CE Fig. Fig. Fig. Fig. 8.8 8.8 8.8 8.8 Switching Time - I Switching Time - I Switching Time - I Switching Time - IC C C C Fig. Fig. Fig. Fig. 8.9 8.9 8.9 8.9 Switching Time - R Switching Time - R Switching Time - R Switching Time - RG G G G Fig. Fig. Fig. Fig. 8.10 8.10 8.10 8.10 rrrrth(j-c) th(j-c) th(j-c) th(j-c) - t - t - t - tw w w w (Guaranteed Maximum) (Guaranteed Maximum) (Guaranteed Maximum) (Guaranteed Maximum) Fig. Fig. Fig. Fig. 8.11 8.11 8.11 8.11 Safe Operating Area Safe Operating Area Safe Operating Area Safe Operating Area (Guaranteed Maximum) (Guaranteed Maximum) (Guaranteed Maximum) (Guaranteed Maximum) Fig. Fig. Fig. Fig. 8.12 8.12 8.12 8.12 Reverse Bias SOA Reverse Bias SOA Reverse Bias SOA Reverse Bias SOA (Guaranteed Maximum) (Guaranteed Maximum) (Guaranteed Maximum) (Guaranteed Maximum) 2014-01-07 Rev.3.0 |
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