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NM25C04L Datasheet(PDF) 1 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
No. de Pieza. NM25C04L
Descripción  4096-Bit Serial Interface CMOS EEPROM (Serial Peripheral Interface Synchronous Bus)
Descarga  12 Pages
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Fabricante  NSC [National Semiconductor (TI)]
Página de inicio  http://www.national.com
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NM25C04L Datasheet(HTML) 1 Page - National Semiconductor (TI)

 
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TLD11729
November 1993
NM25C04L 4096-Bit Serial Interface CMOS EEPROM
(Serial Peripheral Interface (SPI
TM ) Synchronous Bus)
General Description
The NM25C04L is a 4096-bit CMOS EEPROM with an SPI
compatible serial interface The NM25C04L is designed for
data storage in applications requiring both non-volatile
memory and in-system data updates This EEPROM is well
suited for applications using the 68HC11 series of micro-
controllers that support the SPI interface for high speed
communication with peripheral devices via a serial bus to
reduce pin count The NM25C04L is implemented in Nation-
al Semiconductor’s single poly double metal CMOS pro-
cess that provides superior endurance and data retention
The serial data transmission of this device requires four sig-
nal lines to control the device operation Chip Select (CS)
Clock (SCK) Data In (SI) and Data Out (SO) All program-
ming cycles are completely self-timed and do not require an
erase before WRITE
BLOCK WRITE protection is provided by programming the
STATUS REGISTER with one of four levels of write protec-
tion Additionally separate program enable and program
disable instructions are provided for data protection
Hardware data protection is provided by the WP pin to pro-
tect against accidental data changes The HOLD pin allows
the serial communication to be suspended without resetting
the serial sequence
Features
Y
4096 bits organized as 512 bytes
Y
Multiple chips on the same 3-wire bus with separate
chip select lines
Y
Self-timed programming cycle
Y
Simultaneous programming of 1 to 4 bytes at a time
Y
Status register can be polled during programming to
monitor RDYBUSY
Y
Write Protect (WP) pin and write disable instruction for
both hardware and software write protection
Y
Block write protect feature to protect against accidental
writes
Y
Endurance 106 data changes
Y
Data retention greater than 40 years
Y
Packages available 8-pin DIP or 8-pin SO
Block Diagram
TLD11729 – 1
SPITM is a trademark of Motorola Incorporated
C1995 National Semiconductor Corporation
RRD-B30M65Printed in U S A


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