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ML3440SRG Datasheet(PDF) 5 Page - List of Unclassifed Manufacturers

No. de pieza ML3440SRG
Descripción Electrónicos  Micropower Synchronous Buck-Boost DC/DC Converter
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Fabricante Electrónico  ETC1 [List of Unclassifed Manufacturers]
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ML3440SRG Datasheet(HTML) 5 Page - List of Unclassifed Manufacturers

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Rev. B, Sep 2005
Operation (1)
The ML3440 provides high efficiency, low noise power for
applications such as portable instrumentation. The error
amp output voltage on the Vc pin determines the output
duty cycle of the switches. Since the Vc pin is a filtered
signal, it provides rejection of frequencies from well below
the switching frequency. The low RDS(ON), low gate charge
synchronous switches provide high frequency pulse width
modulation control at high efficiency. Schottky diodes
across the synchronous switch D and synchronous switch
B are not required, but provide a lower drop during the
break-before-make time (typically 15ns). The addition of the
Scchottky diodes will improve peak efficiency by typically
1% to 2% at 600KHz. High efficiency is achieved at light
loads when Burst Mode operation is entered and when the
IC’s quiescent current is a low 25uA.
Low Noise Fixed Frequency Operation
Oscillator
The frequency of operation is user programmable and is set
through a resistor from the RT pin to ground where
6e10
f=
RT
Hz
An internally trimmed timing capacitor resides inside the IC,
the oscillator can be synchronized with an external clock
applied to the MODE/SYNC pin. A clock frequency of twice
the desired switching frequency and with a pulse width
between 100ns and 2us is applied. The oscillator RT
component value required is given by:
8 10
10
RT =
fsw
Where fSW = desired synchronized switching frequency. For
example to achieve a 1.2MHz synchronized switching
frequency the applied clock frequency to the MODE/SYNC
pin is set to 2.4MHz and the timing resistor, RT, is set to
66.5k (closest 1% value).
Error Amp
The error amplifier is a voltage mode amplifier, The loop
compensation components are configured around the
amplifier to provide loop compensation for the converter.
The SHDN/SS pin will clamp the error amp output, Vc, to
provide a soft-start function.
Supply Current Limit
The current limit amplifier will shut PMOS switch A off once
the current exceeds 2.7A typical. The current amplifier
delay to output is typically 50ns.
Reverse Current Limit
The reverse current limit amplifier monitors the inductor
current form the output through switch D. Once a negative
inductor current exceeds-400mA typical, the IC will shut
down switch D.
Output Switch Control
Figure 1 shows a simplified diagram of how the four
internal switches are connected to the inductor, VIN, VOUT
and GND. Figure 2 shows the regions of operation for the
ML3440 as a function fo the internal control voltage, VCI.
The VCI voltage is a level shifted voltage form the output
the error amp (Vc pin)(see Figure 5). The output switches
are properly phased so the transfer between operation
modes is continuous, filtered and transparent to the user.
When VIN approaches VOUT the Buck/Boost region is
reached where the conduction time of the four switch
region is typically 150ns. Referring to Figures 1 and 2, the
various regions of operation will now be described.
Figure 1 Simplified Diagram of Output Switches
Figure 2
Switches Control vs Internal Control Voltage, VCl


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