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SMM465FCR03 Datasheet(PDF) 11 Page - Summit Microelectronics, Inc.

No. de pieza SMM465FCR03
Descripción Electrónicos  4-Channel Active DC Output Controller, Monitor, Marginer and Sequencer
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Fabricante Electrónico  SUMMIT [Summit Microelectronics, Inc.]
Página de inicio  http://www.summitmicro.com
Logo SUMMIT - Summit Microelectronics, Inc.

SMM465FCR03 Datasheet(HTML) 11 Page - Summit Microelectronics, Inc.

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SMM465
Preliminary Information
Summit Microelectronics, Inc
2085 1.1 05/27/04
11
I2C 2-WIRE SERIAL INTERFACE AC OPERATING CHARACTERISTICS – 100/400kHz
Over recommended operating conditions, unless otherwise noted. All voltages are relative to GND.
See Figure 4 Timing Diagram.
100kHz
400kHz
Symbol
Description
Conditions
Min
Typ
Max
Min
Typ
Max
Units
fSCL
SCL Clock Frequency
0
100
0
400
KHz
tLOW
Clock Low Period
4.7
1.3
µs
tHIGH
Clock High Period
4.0
0.6
µs
tBUF
Bus Free Time
Before New Transmission
- Note 1/
4.7
1.3
µs
tSU:STA
Start Condition Setup
Time
4.7
0.6
µs
tHD:STA
Start Condition Hold Time
4.0
0.6
µs
tSU:STO
Stop Condition Setup Time
4.7
0.6
µs
tAA
Clock Edge to Data Valid
SCL low to valid
SDA (cycle n)
0.2
3.5
0.2
0.9
µs
tDH
Data Output Hold Time
SCL low (cycle n+1)
to SDA change
0.2
0.2
µs
tR
SCL and SDA Rise Time
Note 1/
1000
1000
ns
tF
SCL and SDA Fall Time
Note 1/
300
300
ns
tSU:DAT
Data In Setup Time
250
150
ns
tHD:DAT
Data In Hold Time
0
0
ns
TI
Noise Filter SCL and SDA
Noise suppression
100
100
ns
tWR_CONFIG Write Cycle Time Config
Configuration
Registers
10
10
ms
tWR_EE
Write Cycle Time EE
Memory Array
5
5
ms
Note: 1/ - Guaranteed by Design.
t
R
t
F
t
HIGH
t
LOW
t
SU:SDA
t
HD:SDA
t
SU:DAT
t
HD:DAT
t
SU:STO
t
BUF
t
DH
t
AA
SCL
SDA
(IN)
SDA
(OUT)
t
W R (For W rite Operation Only)
Figure 4 - Basic I
2C Serial Interface Timing
TIMING DIAGRAMS


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