Motor de Búsqueda de Datasheet de Componentes Electrónicos |
|
SMM150ER03 Datasheet(PDF) 4 Page - Summit Microelectronics, Inc. |
|
SMM150ER03 Datasheet(HTML) 4 Page - Summit Microelectronics, Inc. |
4 / 22 page SMM150 Preliminary Information Summit Microelectronics, Inc 2075 2.6 05/13/05 4 PIN DESCRIPTIONS QFN Pad Number Ultra CSP TM Ball Number Pin Type Pin Name Pin Description 28 B2 I/O SDA I 2C Bi-directional data line 1 A1 I SCL I 2C clock input. 2 B1 I A2 4 C1 I A1 6 D1 I A0 The address pins are biased either to VDD, GND or left floating. This allows for a total of 21 distinct device addresses. When communicating with the SMM150 over the 2-wire bus these pins provide a mechanism for assigning a unique bus address. 8 D2 I WP Programmable Write Protect active high/low input. When asserted, writes to the configuration registers and general purpose EE are not allowed. The WP input is internally tied to VDD with a 50K Ω resistor. 10 E2 CAP CAPM External capacitor input used to filter the VM input, 0.2 µF. 20 B3 O TRIM Output voltage used to control and/or margin converter voltages. Connect to the converter trim input. 14 E4 I VM Voltage monitor input. Connect to the DC-DC converter positive sense line or its’ +Vout pin. 21 A4 PWR VDD Power supply of the part. 23 A3 PWR VDD_CAP External capacitor input used to filter the internal VDD supply rail. 7 E1 GND GND Ground of the part. The SMM150 ground pin should be connected to the ground of the device under control or to a star point ground. PCB layout should take into consideration ground drops. 24 C3 I MUP Margin up command input. Asserted high. The MUP input is internally tied to VDD with a 50K Ω resistor. 25 A2 I MDN Margin down command input. Asserted high. The MDN input is internally tied to VDD with a 50K Ω resistor. 19 B4 I COMP1 12 E3 I COMP2 COMP1 and COMP2 are high impedance inputs, each connected internally to a comparator and compared against the internally programmable VREF voltage. Each comparator can be independently programmed to monitor for UV or OV. The monitor level is set externally with a resistive voltage divider. 11 D3 O FAULT# When either of the COMP1 or COMP2 inputs are in fault the open- drain FAULT# output will be pulled low. A configuration option exists to disable the FAULT# output while the device is margining. 5 C2 I/O READY Programmable active high/low open drain output indicates that VM is at its set point. When programmed as an active high output, READY can also be used as an input. When pulled low, it will latch the state of the comparator inputs. 3, 9, 13, 15-18, 22, 26, 27, 29 C4, D4 NC NC No Connect. The bottom side metal plate (Pad 29) can be connected to GND or left floating. |
Número de pieza similar - SMM150ER03 |
|
Descripción similar - SMM150ER03 |
|
|
Enlace URL |
Política de Privacidad |
ALLDATASHEET.ES |
¿ALLDATASHEET es útil para Ud.? [ DONATE ] |
Todo acerca de Alldatasheet | Publicidad | Contáctenos | Política de Privacidad | Intercambio de Enlaces | Lista de Fabricantes All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |