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DETAILED DESCRIPTION

VOLTAGE OUTPUT MODE

Vout + VFB

R1

R1 ) R2

(1)

CURRENT OUTPUT MODE

I

V

ISET

R

SET

K

ISET

(2)

TPS61140

TPS61141

SLVS624A – JANUARY 2006 – REVISED FEBRUARY 2006

The TPS61140/1 uses a single boost converter to provide pre-regulated power for the device’s current output

and voltage output. The current output is regulated by a low side current sink connected to the IFB pin, while a

low dropout linear regulator (LDO) on the output of the boost regulator provides the voltage output. The LDO is

used for its low ripple and fast transient response. The device automatically sets the boost output voltage to

minimize power losses of the linear circuits (i.e., the current sink and LDO), and yet provide enough headroom

for their DC operation and transient response. Such an implementation takes advantage of the high quality

output of linear circuits, while maintaining high efficiency offered by the boost converter.

When only the voltage output is enabled (i.e., SELV high and SELI low), LDO pass element Q2, shown in the

block diagram, regulates Vout per the external resistor divider connected to the VFB pin. Current sink Q3 turns

off, thereby opening the current path. The boost converter operates in PFM (pulse frequency modulation) mode

for high efficiency over a wide load range. Operating in PFM mode, the device turns on the power switch Q1

voltage is applied across the inductor, and its current linearly increases until reaching current limit, upon which

Q1 is turned off. At this time, the built-in power diode is then forward biased and releases the inductor energy to

the output. After the minimum off time, Q1 is allowed to turn back on again only if the voltage across the LDO is

still below the threshold. Otherwise, Q1 stays off to reduce the switching losses and IC quiescent current. The

minimum off time ensures discontinuous operation (DCM) in which inductor current always ramps down to zero

in each switching cycle. DCM operation is required for feedback loop stability. There is also a maximum Q1 on

time which turns off Q1 even if the current is still below the current limiting threshold. By minimizing the voltage

drop across the LDO, the LDO maintains high efficiency. For 15V output, the LDO accounts for approximately

2% of efficiency loss.

Because PFM control reduces the switch frequency at light load, the boost regulator produces higher output

ripple. Fortunately, the LDO’s high PSRR (power supply rejection ratio) attenuates the ripple on the VOUT pin for

optimal OLED display performance.

The output voltage of the Vout pin can be programmed by the resistor divider connected to the VFB pin, as

shown in the Typical Application.

Where VFB = reference voltage of the VFB pin

When only the current output is selected (i.e., SELV low and SELI high), the LDO, and therefore VOUT is turned

off, and the current sink device Q3, shown in the block diagram, regulates the current output. The boost

converter uses fixed frequency PWM control to provide high output current and low output ripple noises. In this

headroom to operate and minimizing losses across the current sink circuit.

The regulation current is set by the resistor on the Iset pin based on

where

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