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TPS65560RGTTG4 Datasheet(PDF) 4 Page - Texas Instruments |
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TPS65560RGTTG4 Datasheet(HTML) 4 Page - Texas Instruments |
4 / 13 page www.ti.com PIN ASSIGNMENT PGND PGND CHG XFULL PowerPAD SW SW VCC F_ON NC − No internal connection 16 15 14 13 5 6 7 8 1 2 3 4 12 11 10 9 TPS65560 SLVS608 – JANUARY 2006 RGT (Top View) TERMINAL FUNCTIONS PIN NUMBER SIGNAL I/O DESCRIPTION 1, 2 SW O Primary side switch. Connect SW to the switched side of the transformer I Power supply input. Connect VCC to an input supply from 2.7 V to 4 V. Bypass VCC to GND 3 VCC with a 1- µF ceramic capacitor as close as possible to the IC. I G_IGBT control input. Drives F_ON with the flash discharge signal. A logic high on F_ON 4 F_ON drives G_IGBT high when CHG is Low. See the IGBT Driver Conrtol section for details. 5, 8, 13, 16 NC No internal connection I Primary side peak current control input. The voltage at I_PEAK sets the peak current into 6 I_PEAK SW. See the Programming Peak Current section for details on selecting V(I_PEAK). 7 G_IGBT O IGBT gate driver output. G_IGBT swings from PGND to VCC to drive external IGBT devices. Charge completion indicator output. XFULL is an open-drain output that pulls low once the output is fully charged. XFULL is high impedance during charging and all fault conditions. 9 XFULL O XFULL is reseted when CHG turns Low from High. See the Indicating Charging Status section for details. 10 CHG I Charge control input. Drive CHG high to initiate charging of the output. Drive CHG low to terminate charging. 11, 12 PGND Power ground. Connect to the ground plane. 14 TEST_GND Used by TI, should be connected to PGND and ground plane. Battery voltage monitor input. Connect VBAT to an input supply from 1.6 V to 12 V. Bypass 15 VBAT I VBAT to GND with a 10- µF ceramic capacitor (C1 in Figure 1, as close as possible to the battery) and a 1- µF ceramic capacitor (C2 in Figure 1, as close as possible to the IC). 4 Submit Documentation Feedback |
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