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SN74AVCH2T45DCUT Datasheet(PDF) 1 Page - Texas Instruments

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No. de pieza SN74AVCH2T45DCUT
Descripción Electrónicos  DUAL-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
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Fabricante Electrónico  TI [Texas Instruments]
Página de inicio  http://www.ti.com
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SN74AVCH2T45DCUT Datasheet(HTML) 1 Page - Texas Instruments

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FEATURES
DCT OR DCU PACKAGE
(TOP VIEW)
1
2
3
4
8
7
6
5
VCCA
A1
A2
GND
VCCB
B1
B2
DIR
4
3
2
1
5
6
7
8
GND
A2
A1
VCCA
DIR
B2
B1
VCCB
YEP OR YZP PACKAGE
(BOTTOM VIEW)
DESCRIPTION/ORDERING INFORMATION
SN74AVCH2T45
DUAL-BIT DUAL-SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
SCES582D – JULY 2004 – REVISED AUGUST 2005
Max Data Rates
Available in the Texas Instruments
– 500 Mbps (1.8-V to 3.3-V Translation)
NanoStar™ and NanoFree™ Packages
– 320 Mbps (<1.8-V to 3.3-V Translation)
Control Inputs VIH/VIL Levels Are Referenced
– 320 Mbps (Translate to 2.5 V or 1.8 V)
to VCCA Voltage
– 180 Mbps (Translate to 1.5 V)
Fully Configurable Dual-Rail Design Allows
– 240 Mbps (Translate to 1.2 V)
Each Port to Operate Over the Full 1.2-V to
Latch-Up Performance Exceeds 100 mA Per
3.6-V Power-Supply Range
JESD 78, Class II
I/Os Are 4.6-V Tolerant
ESD Protection Exceeds JESD 22
Ioff Supports Partial-Power-Down Mode
– 2000-V Human-Body Model (A114-A)
Operation
– 200-V Machine Model (A115-A)
Bus Hold on Data Inputs Eliminates the Need
– 1000-V Charged-Device Model (C101)
for External Pullup/Pulldown Resistors
This
dual-bit
noninverting
bus
transceiver
uses
two
separate
configurable
power-supply
rails.
The
SN74AVCH2T45 is optimized to operate with VCCA/VCCB set at 1.4 V to 3.6 V. It is operational with VCCA/VCCB as
low as 1.2 V. The A port is designed to track VCCA. VCCA accepts any supply voltage from 1.2 V to 3.6 V. The B
port is designed to track VCCB. VCCB accepts any supply voltage from 1.2 V to 3.6 V. This allows for universal
low-voltage bidirectional translation between any of the 1.2-V, 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes.
The SN74AVCH2T45 is designed for asynchronous communication between data buses. The device transmits
data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the
direction-control (DIR) input.
ORDERING INFORMATION
TA
PACKAGE(1)
ORDERABLE PART NUMBER
TOP-SIDE MARKING(2)
NanoStar™ – WCSP (DSBGA)
SN74AVCH2T45YEPR(3)
0.23-mm Large Bump – YEP
Tape and reel
NanoFree™ – WCSP (DSBGA)
SN74AVCH2T45YZPR(3)
–40
°C to 85°C 0.23-mm Large Bump – YZP (Pb-free)
SSOP – DCT
Tape and reel
SN74AVCH2T45DCTR
ET2_ _ _
VSSOP – DCU
Tape and reel
SN74AVCH2T45DCUR
ET2_
(1)
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
(2)
DCT: The actual top-side marking has three additional characters that designate the year, month, and assembly/test site.
DCU: The actual top-side marking has one additional character that designates the assembly/test site.
YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following
character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb,
• = Pb-free).
(3)
Package preview
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoStar, NanoFree are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright © 2004–2005, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.


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