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ZXLD1100 Datasheet(PDF) 5 Page - Zetex Semiconductors |
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ZXLD1100 Datasheet(HTML) 5 Page - Zetex Semiconductors |
5 / 16 page DEVICE DESCRIPTION The device is a PFM flyback dc-dc boost converter, working in discontinuous mode. With reference to the chip block diagram and typical application circuit, the operation of the device is as follows: Control loop When 'EN' is high, the control circuits become active and the low side of the coil (L1) is switched to ground via NDMOS transistor (MN). The current in L1 is allowed to build up to an internally defined level (nominally 320mA) before MN is turned off. The energy stored in L1 is then transferred to the output capacitor (C2) via schottky diode (D1). When the voltage on C2 has risen above the threshold voltage of the series connected LEDs, current will flow through external sense resistor R1. The voltage developed across R1 is sensed at pin 'FB' and compared to a 100mV reference voltage (VREF). A comparator senses when the feedback voltage is above VREF and its output is used to control the 'off' time of the output switch. The control loop is self-oscillating, producing pulses of up to 5 s maximum duration (switch 'on'), at a frequency that varies in proportion to the LED current. The feedback loop maintains a voltage of VREF at the FB pin and therefore defines a maximum LED current equal to VREF divided by R1. The minimum 'off' time of the output switch is fixed at 0.5 s nominal, to allow time for the coil's energy to be dissipated before the switch is turned on again. This maintains stable and efficient operation in discontinuous mode. Open circuit protection There is an internal avalanche diode between the VSENSE and FB pins of the device. This diode, together with the associated resistors provides open circuit protection when the VSENSE pin is connected to the output voltage. In the event of an open circuit condition, the output voltage will rise above the breakdown voltage of the internal diode, which will then conduct and override the control signal from the current sense resistor. This maintains the output voltage at a level below the breakdown voltage of the output switch. Supply current in this condition will fall to a low value as the control loop provides only the bias current for the diode. Filtered PWM operation The input of an internal low pass filter is switched to VREF when the EN pin is high and switched to ground when the EN pin is low. The output of this filter drives the comparator within the control loop. A continuous high state on EN therefore provides a filtered voltage of value VREF to the comparator. However, by varying the duty cycle of the EN signal at a suitably high frequency (f>10kHz), the control loop will see a voltage, that has an average value equal to the duty cycle multiplied by VREF. This provides a means of adjusting the output current to a lower value. It also allows the device to be both turned on and adjusted with a single signal at the 'EN' pin. The output during this mode of operation will be a dc current equal to (VREF/R1) x duty cycle Gated PWM operation The internal circuitry of the ZXLD1100 is turned off when no signal is present on the 'EN' pin for more than 120 s (nominal). A low frequency signal applied to the EN pin will therefore gate the device 'on' and 'off' at the gating frequency and the duty cycle of this signal can be varied to provide a 'chopped' output current equal to (VREF/R1) x duty cycle. For best accuracy, the gating frequency should be made as low as possible (e.g. below 1kHz), such that the turn off delay of the chip is only a small proportion of the gating period Further details of setting output current are given in the applications section under brightness control. ZXLD1100 SEMICO NDUC TORS ISSUE 4 - JULY 2004 5 |
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