Rev: 1.04 3/2000

11/23

© 2000, Giga Semiconductor, Inc.

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

E

GS820H32AT/Q-150/138/133/117/100/66

Notes:

1. Include scope and jig capacitance.

2. Test conditions as specified with output loading as shown in Fig. 1 unless otherwise noted.

4. Device is deselected as defined by the Truth Table.

AC Test Conditions

Parameter

Conditions

Input high level

2.3V

Input low level

0.2V

Input slew rate

1V/ns

Input reference level

1.25V

Output reference level

1.25V

Output load

Fig. 1& 2

DC Electrical Characteristics

Parameter

Symbol

Test Conditions

Min

Max

Input Leakage Current

(except mode pins)

-1uA

1uA

ZZ Input Current

0V

≤ V

IH

-1uA

-1uA

1uA

300uA

Mode Pin Input Current

0V

≤ V

IL

-300uA

-1uA

1uA

1uA

Output Leakage Current

Output Disable,

-1uA

1uA

Output High Voltage

1.7V

Output High Voltage

2.4V

Output Low Voltage

0.4V

DQ

VT=1.25V

50

Ω

DQ

2.5V

Output Load 1

Output Load 2

225

Ω

225

Ω

* Distributed Test Jig Capacitance