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GS8182D18D-167I Datasheet(PDF) 10 Page - GSI Technology

No. de pieza GS8182D18D-167I
Descripción Electrónicos  18Mb Burst of 4 SigmaQuad-II SRAM
Download  27 Pages
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Fabricante Electrónico  GSI [GSI Technology]
Página de inicio  http://www.gsitechnology.com
Logo GSI - GSI Technology

GS8182D18D-167I Datasheet(HTML) 10 Page - GSI Technology

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Preliminary
GS8182D18D-250/200/167
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.02 11/2004
10/27
© 2003, GSI Technology
FLXDrive-II Output Driver Impedance Control
HSTL I/O SigmaQuad-II SRAMs are supplied with programmable impedance output drivers. The ZQ pin must be connected to
VSS via an external resistor, RQ, to allow the SRAM to monitor and adjust its output driver impedance. The value of RQ must be
5X the value of the intended line impedance driven by the SRAM. The allowable range of RQ to guarantee impedance matching
with a vendor-specified tolerance is between 150
Ω and 300Ω. Periodic readjustment of the output driver impedance is necessary as
the impedance is affected by drifts in supply voltage and temperature. The SRAM’s output impedance circuitry compensates for
drifts in supply voltage and temperature every 1024 cycles. A clock cycle counter periodically triggers an impedance evaluation,
resets and counts again. Each impedance evaluation may move the output driver impedance level one step at a time towards the
optimum level. The output driver is implemented with discrete binary weighted impedance steps.
x18 Byte Write Enable (BWn) Truth Table
BW0 BW1
D0–D8
D9–D17
1
1
Don’t Care
Don’t Care
0
1
Data In
Don’t Care
1
0
Don’t Care
Data In
0
0
Data In
Data In


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