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GS816272CGC-333I Datasheet(PDF) 3 Page - GSI Technology

No. de pieza GS816272CGC-333I
Descripción Electrónicos  256K x 72 18Mb S/DCD Sync Burst SRAMs
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Fabricante Electrónico  GSI [GSI Technology]
Página de inicio  http://www.gsitechnology.com
Logo GSI - GSI Technology

GS816272CGC-333I Datasheet(HTML) 3 Page - GSI Technology

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GS816272CC-333/300/250/200/150
Preliminary
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.01 2/2005
3/31
© 2004, GSI Technology
BPR1999.05.18
GS816272C BGA Pin Description
Symbol
Type
Description
A0, A1
I
Address field LSBs and Address Counter Preset Inputs.
A
I
Address Inputs
DQA
DQB
DQC
DQD
DQE
DQF
DQG
DQH
I/O
Data Input and Output pins
BA, BB, BC,BD, BE, BF, BG,BH
I
Byte Write Enable for DQA, DQB, DQC, DQD, DQE,
DQF, DQG, DQH I/Os; active low
NC
No Connect
CK
I
Clock Input Signal; active high
GW
I
Global Write Enable—Writes all bytes; active low
E1, E3
I
Chip Enable; active low
E2
I
Chip Enable; active high
G
I
Output Enable; active low
ADV
I
Burst address counter advance enable; active low
ADSP, ADSC
I
Address Strobe (Processor, Cache Controller); active low
ZZ
I
Sleep Mode control; active high
FT
I
Flow Through or Pipeline mode; active low
LBO
I
Linear Burst Order mode; active low
SCD
I
Single Cycle Deselect/Dual Cycle Deselect Mode Control
MCH
I
Must Connect High
MCL
Must Connect Low
BW
I
Byte Enable; active low
ZQ
I
FLXDrive Output Impedance Control
(Low = Low Impedance [High Drive], High = High Impedance [Low Drive])
TMS
I
Scan Test Mode Select
TDI
I
Scan Test Data In
TDO
O
Scan Test Data Out
TCK
I
Scan Test Clock
VDD
I
Core power supply
VSS
I
I/O and Core Ground
VDDQ
I
Output driver power supply


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