Motor de Búsqueda de Datasheet de Componentes Electrónicos |
|
AD9879 Datasheet(PDF) 2 Page - Analog Devices |
|
AD9879 Datasheet(HTML) 2 Page - Analog Devices |
2 / 24 page REV. 0 –2– AD9879–SPECIFICATIONS Test Parameter Temp Level Min Typ Max Unit OSCIN AND XTAL CHARACTERISTICS Frequency Range Full II 3 29 MHz Duty Cycle Full II 35 50 65 % Input Impedance 25ºC III 100||3M Ω||pF MCLK Cycle to Cycle Jitter 25ºC III 6 ps rms Tx DAC CHARACTERISTICS Resolution N/A N/A 12 Bits Maximum Sample Rate Full II 232 MHz Full-Scale Output Current Full II 4 10 20 mA Gain Error (Using Internal Reference) Full II –2.0 –1.0 +2.0 %FS Offset Error 25ºC III ±1.0 %FS Reference Voltage (REFIO Level) 25ºC III 1.23 V Differential Nonlinearity (DNL) 25ºC III ±2.5 LSB Integral Nonlinearity (INL) 25ºC III ±8 LSB Output Capacitance 25ºC III 5 pF Phase Noise @ 1 kHz Offset, 42 MHz Crystal and OSCIN Multiplier Enabled at 16 25ºC III –110 dBc/Hz Output Voltage Compliance Range Full II –0.5 +1.5 V Wideband SFDR 5 MHz Analog Out, IOUT = 10 mA Full I 60.8 66.9 dBc 65 MHz Analog Out, IOUT = 10 mA Full I 44.0 46.2 dBc Narrow-band SFDR ( ±1 MHz Window): 5 MHz Analog Out, IOUT = 10 mA Full I 65.4 72.3 dBc Tx MODULATOR CHARACTERISTICS I/Q Offset Full II 50 55 dB Pass-Band Amplitude Ripple (f < fIQCLK/8) Full II ±0.1 dB Pass-Band Amplitude Ripple (f < fIQCLK/4) Full II ±0.5 dB Stop-Band Response (f > fIQCLK 3/4) Full II –63 dB Tx GAIN CONTROL Gain Step Size 25ºC III 0.5 dB Gain Step Error 25ºC III <0.05 dB Settling Time to 1% (Full-Scale Step) 25ºC III 1.8 s IQ ADC CHARACTERISTICS Resolution * N/A N/A 6 Bits Maximum Conversion Rate Full III 14.5 MHz Pipeline Delay N/A N/A 3.5 ADC Cycles Offset Matching between I and Q ADCs ±4.0 LSBs Gain Matching between I and Q ADCs ±2.0 LSBs Analog Input Input Voltage Range * Full III 1 Vppd Input Capacitance 25ºC III 2.0 pF Differential Input Resistance 25ºC III 4 k Ω AC Performance (AIN = 0.5 dBFS, fIN = 5 MHz) Effective Number of Bits (ENOB) Full I 5.25 5.8 Bits Signal-to-Noise Ratio (SNR) Full I 36.5 dB Total Harmonic Distortion (THD) Full I –50 dB Spurious-Free Dynamic Range (SFDR) Full I 51 dB (VAS = 3.3 V 5%, VDS = 3.3 V 10%, fOSCIN = 27 MHz, fSYSCLK = 216 MHz, fMCLK = 54 MHz (M = 8), ADC Clock from OSCIN, RSET = 4.02 k , 75 DAC Load) *IQ ADC in Default Mode. ADC Clock Select Register 8, Bit 3 set to “0.” |
Número de pieza similar - AD9879 |
|
Descripción similar - AD9879 |
|
|
Enlace URL |
Política de Privacidad |
ALLDATASHEET.ES |
¿ALLDATASHEET es útil para Ud.? [ DONATE ] |
Todo acerca de Alldatasheet | Publicidad | Contáctenos | Política de Privacidad | Intercambio de Enlaces | Lista de Fabricantes All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |